Discussion:
[N8VEM: 19365] New Mark IV UP
AG5AT
2015-03-13 00:57:10 UTC
Permalink
All,

I have gotten my new Mark IV up and running. Well once I figured out that
the serial cable isn't the same as the N8VEM boards. Once I figured that
out, it just came up and ran. Before figuring out the Blinky Blinky from
John's Test instructions, I wasn't sure what wasn't right. I knew it was
sort of running because the SD card light was blinking. Well I found out
my red/green led from chicken shack was "backwards". Red was RUN.. So I
turned it around, all fine.

It is built with all AHCT chips as I did my Zeta, although I will probably
have to replace U25 with an LS240.

I started out with a 10mhz Z180 and a 9.216mhz clock. That worked fine..
(1x clock, 0 wait, 1 i/o wait). I then stuck an 18.432mhz clock in (still
1x, 0 wait, 1 i/o) and it ran.
Next was getting an SD card running. Wandered thru Will's UNA instructions
a few time, and went ahead and put a partition on a 256mb SD, all went
well.
Onward to IDE CF card. All worked fine.

Next tried overclocking.... It didn't work. So I put a 20 mhz chip in.
Same results. So I added one memory wait.

Welcome to Single Board Computing on the N8VEM SBC Z180 Mark IV
running on a Z180 advanced S-class processor
with 512K of RAM and 512K of ROM
UNA BIOS version 1.00-17 of 01-Aug-2014. (6)

Do you wish to enter SETUP? [N/y]:
Configuring the Z180 SBC Mark IV board:
Oscillator: 18.432 Mhz Clock PHI: 36.864 Mhz Effective: 29.10 Mhz

I am not sure other than trying to use a 20mhz at 36mhz. I probably will
get a 33mhz chip.

Anyway, this is an awesome fun board. Next onward to Fuzix. (I am a Unix
guy).

Aug
In Arkansas
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John Coffman
2015-03-13 19:16:07 UTC
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Aug,<br>
<br>
The "Effective:&nbsp; XX.XXmhz" speed is an estimated performance speed,
assuming one could run with Zero wait states.<br>
<br>
With the 18.432Mhz oscillator at 2x overclocking, the fastest anyone
has been able to run is with 1 wait state.&nbsp; In my testing, a
14.318Mhz oscillator, 2x clocking (28mhz), is the fastest I have
been able to run at 0 wait states.<br>
<br>
--John<br>
<br>
<br>
<br>
<br>
On 03/12/2015 05:57 PM, AG5AT wrote:
<blockquote
cite="mid:ff71e226-1aa8-4d47-8c2e-***@googlegroups.com"
type="cite">
<div dir="ltr">All,<br>
<br>
I have gotten my new Mark IV up and running.&nbsp; Well once I
figured out that the serial cable isn't the same as the N8VEM
boards.&nbsp; Once I figured that out, it just came up and ran.&nbsp;
Before figuring out the Blinky Blinky from John's Test
instructions, I wasn't sure what wasn't right.&nbsp; I knew it was
sort of running because the SD card light was blinking.&nbsp; Well I
found out my red/green led from chicken shack was "backwards".&nbsp;
Red was RUN.. So I turned it around, all fine.<br>
<br>
It is built with all AHCT chips as I did my Zeta, although I
will probably have to replace U25 with an LS240.&nbsp; <br>
<br>
I started out with a 10mhz Z180 and a 9.216mhz clock.&nbsp; That
worked fine..&nbsp; (1x clock, 0 wait, 1 i/o wait).&nbsp; I then stuck an
18.432mhz clock in (still 1x, 0 wait, 1 i/o) and it ran.<br>
Next was getting an SD card running.&nbsp; Wandered thru Will's UNA
instructions a few time, and went ahead and put a partition on a
256mb SD, all went well.&nbsp; <br>
Onward to IDE CF card.&nbsp; All worked fine.<br>
<br>
Next tried overclocking.... It didn't work.&nbsp; So I put a 20 mhz
chip in.&nbsp; Same results.&nbsp; So I added one memory wait.<br>
<br>
Welcome to Single Board Computing on the N8VEM SBC Z180 Mark IV<br>
&nbsp; running on a Z180 advanced S-class processor<br>
&nbsp; with 512K of RAM and 512K of ROM<br>
UNA BIOS version 1.00-17 of
01-Aug-2014.&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (6)<br>
<br>
Do you wish to enter SETUP? [N/y]: <br>
Configuring the Z180 SBC Mark IV board:<br>
Oscillator:&nbsp; 18.432 Mhz&nbsp;&nbsp; Clock PHI:&nbsp; 36.864 Mhz&nbsp;&nbsp; Effective:&nbsp;
29.10 Mhz<br>
<br>
I am not sure other than trying to use a 20mhz at 36mhz.&nbsp; I
probably will get a 33mhz chip.<br>
<br>
Anyway, this is an awesome fun board.&nbsp; Next onward to Fuzix.&nbsp; (I
am a Unix guy).&nbsp; <br>
<br>
Aug<br>
In Arkansas<br>
<br>
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Kip Koon
2015-03-14 04:06:13 UTC
Permalink
Hi John,
With the 18.432Mhz oscillator at 2x overclocking, the fastest anyone has been able to run is with 1 wait state.
That would make sense since the fastest a 33MHZ chip can theoretically run with 2x overclocking is with a 33mhz/2=16.5MHZ or less frequency oscillator and 18.432 is clearly higher than that. Would a 16.5MHZ with 2x overclocking run correctly? How about just using a 33MHZ oscillator with no overclocking? Of course, this is still all theoretical for me since I’m still getting chips together. :) What do you think John?



Kip Koon

***@sc.rr.com

http://www.cocopedia.com/wiki/index.php/Kip_Koon





From: ***@googlegroups.com [mailto:***@googlegroups.com] On Behalf Of John Coffman
Sent: Friday, March 13, 2015 3:16 PM
To: ***@googlegroups.com
Subject: Re: [N8VEM: 19365] New Mark IV UP



Aug,

The "Effective: XX.XXmhz" speed is an estimated performance speed, assuming one could run with Zero wait states.

With the 18.432Mhz oscillator at 2x overclocking, the fastest anyone has been able to run is with 1 wait state. In my testing, a 14.318Mhz oscillator, 2x clocking (28mhz), is the fastest I have been able to run at 0 wait states.

--John




On 03/12/2015 05:57 PM, AG5AT wrote:

All,

I have gotten my new Mark IV up and running. Well once I figured out that the serial cable isn't the same as the N8VEM boards. Once I figured that out, it just came up and ran. Before figuring out the Blinky Blinky from John's Test instructions, I wasn't sure what wasn't right. I knew it was sort of running because the SD card light was blinking. Well I found out my red/green led from chicken shack was "backwards". Red was RUN.. So I turned it around, all fine.

It is built with all AHCT chips as I did my Zeta, although I will probably have to replace U25 with an LS240.

I started out with a 10mhz Z180 and a 9.216mhz clock. That worked fine.. (1x clock, 0 wait, 1 i/o wait). I then stuck an 18.432mhz clock in (still 1x, 0 wait, 1 i/o) and it ran.
Next was getting an SD card running. Wandered thru Will's UNA instructions a few time, and went ahead and put a partition on a 256mb SD, all went well.
Onward to IDE CF card. All worked fine.

Next tried overclocking.... It didn't work. So I put a 20 mhz chip in. Same results. So I added one memory wait.

Welcome to Single Board Computing on the N8VEM SBC Z180 Mark IV
running on a Z180 advanced S-class processor
with 512K of RAM and 512K of ROM
UNA BIOS version 1.00-17 of 01-Aug-2014. (6)

Do you wish to enter SETUP? [N/y]:
Configuring the Z180 SBC Mark IV board:
Oscillator: 18.432 Mhz Clock PHI: 36.864 Mhz Effective: 29.10 Mhz

I am not sure other than trying to use a 20mhz at 36mhz. I probably will get a 33mhz chip.

Anyway, this is an awesome fun board. Next onward to Fuzix. (I am a Unix guy).

Aug
In Arkansas
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John Coffman
2015-03-14 14:40:04 UTC
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Kip,<br>
<br>
The need for wait-states is determined by the memory speed.<br>
<br>
An 18.432Mhz oscillator at 2X clocking is actually running the CPU
at a speed higher than the manufacturer guarantees.&nbsp; The risk is
overheating and burning it out.&nbsp; In checking out this speed, I used
the finger test to check the temperature of the chip.&nbsp; The plastic
package is warm, but not hot.&nbsp; My conclusion is that it is probably
safe to run a 33Mhz Z180 at 36.864Mhz, and a lot of folks are doing
this.<br>
<br>
Faster memory would allow running at 0 w.s., but I am not
complaining.<br>
<br>
The main issue with running at such a high speed concerns the use of
old peripheral chips.&nbsp; Even at 4 I/O wait states, some are just not
fast enough to insure reliable operation.&nbsp; The good news with Mark
IV is that CF cards and SD cards can all cope with the great
peripheral speed very comfortably.<br>
<br>
--John<br>
<br>
<br>
<br>
<br>
<br>
On 03/13/2015 09:06 PM, Kip Koon wrote:
<blockquote cite="mid:002501d05e0c$47e93a30$d7bbae90$@sc.rr.com"
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<p class="MsoNormal"><span style="font-size: 11pt; font-family:
&quot;Calibri&quot;,&quot;sans-serif&quot;; color: rgb(31,
73, 125);">Hi John,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size: 11pt; font-family:
&quot;Calibri&quot;,&quot;sans-serif&quot;; color: rgb(31,
73, 125);">&gt;</span> With the 18.432Mhz oscillator at 2x
overclocking, the fastest anyone has been able to run is with
1 wait state.&nbsp;<o:p></o:p></p>
<p class="MsoNormal">That would make sense since the fastest a
33MHZ chip can theoretically run with 2x overclocking is with
a 33mhz/2=16.5MHZ or less frequency oscillator and 18.432 is
clearly higher than that.&Acirc;&nbsp; Would a 16.5MHZ with 2x
overclocking run correctly?&Acirc;&nbsp; How about just using a 33MHZ
oscillator with no overclocking?&Acirc;&nbsp; Of course, this is still
all theoretical for me since I&acirc;&#8364;&#8482;m still getting chips
together.&Acirc;&nbsp; :)&Acirc;&nbsp; What do you think John?<span
style="font-size: 11pt; font-family:
&quot;Calibri&quot;,&quot;sans-serif&quot;; color: rgb(31,
73, 125);"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size: 11pt; font-family:
&quot;Calibri&quot;,&quot;sans-serif&quot;; color: rgb(31,
73, 125);"><o:p>&nbsp;</o:p></span></p>
<div>
<p class="MsoNormal"><span style="font-family:
&quot;Calibri&quot;,&quot;sans-serif&quot;; color: rgb(31,
73, 125);">Kip Koon<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-family:
&quot;Calibri&quot;,&quot;sans-serif&quot;; color: rgb(31,
73, 125);"><a moz-do-not-send="true"
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73, 125);"><a moz-do-not-send="true"
href="http://www.cocopedia.com/wiki/index.php/Kip_Koon">http://www.cocopedia.com/wiki/index.php/Kip_Koon</a><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-family:
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<p class="MsoNormal"><span style="font-size: 11pt; font-family:
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windowtext;"> <a class="moz-txt-link-abbreviated" href="mailto:***@googlegroups.com">***@googlegroups.com</a>
[<a class="moz-txt-link-freetext" href="mailto:***@googlegroups.com">mailto:***@googlegroups.com</a>] <b>On Behalf Of </b>John
Coffman<br>
<b>Sent:</b> Friday, March 13, 2015 3:16 PM<br>
<b>To:</b> <a class="moz-txt-link-abbreviated" href="mailto:***@googlegroups.com">***@googlegroups.com</a><br>
<b>Subject:</b> Re: [N8VEM: 19365] New Mark IV UP<o:p></o:p></span></p>
</div>
</div>
<p class="MsoNormal"><o:p>&nbsp;</o:p></p>
<p class="MsoNormal">Aug,<br>
<br>
The "Effective:&nbsp; XX.XXmhz" speed is an estimated performance
speed, assuming one could run with Zero wait states.<br>
<br>
With the 18.432Mhz oscillator at 2x overclocking, the fastest
anyone has been able to run is with 1 wait state.&nbsp; In my
testing, a 14.318Mhz oscillator, 2x clocking (28mhz), is the
fastest I have been able to run at 0 wait states.<br>
<br>
--John<br>
<br>
<br>
<br>
<br>
On 03/12/2015 05:57 PM, AG5AT wrote: <o:p></o:p></p>
<div>
<p class="MsoNormal" style="margin-bottom: 12pt;">All,<br>
<br>
I have gotten my new Mark IV up and running.&nbsp; Well once I
figured out that the serial cable isn't the same as the
N8VEM boards.&nbsp; Once I figured that out, it just came up and
ran.&nbsp; Before figuring out the Blinky Blinky from John's Test
instructions, I wasn't sure what wasn't right.&nbsp; I knew it
was sort of running because the SD card light was blinking.&nbsp;
Well I found out my red/green led from chicken shack was
"backwards".&nbsp; Red was RUN.. So I turned it around, all fine.<br>
<br>
It is built with all AHCT chips as I did my Zeta, although I
will probably have to replace U25 with an LS240.&nbsp; <br>
<br>
I started out with a 10mhz Z180 and a 9.216mhz clock.&nbsp; That
worked fine..&nbsp; (1x clock, 0 wait, 1 i/o wait).&nbsp; I then stuck
an 18.432mhz clock in (still 1x, 0 wait, 1 i/o) and it ran.<br>
Next was getting an SD card running.&nbsp; Wandered thru Will's
UNA instructions a few time, and went ahead and put a
partition on a 256mb SD, all went well.&nbsp; <br>
Onward to IDE CF card.&nbsp; All worked fine.<br>
<br>
Next tried overclocking.... It didn't work.&nbsp; So I put a 20
mhz chip in.&nbsp; Same results.&nbsp; So I added one memory wait.<br>
<br>
Welcome to Single Board Computing on the N8VEM SBC Z180 Mark
IV<br>
&nbsp; running on a Z180 advanced S-class processor<br>
&nbsp; with 512K of RAM and 512K of ROM<br>
UNA BIOS version 1.00-17 of
01-Aug-2014.&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (6)<br>
<br>
Do you wish to enter SETUP? [N/y]: <br>
Configuring the Z180 SBC Mark IV board:<br>
Oscillator:&nbsp; 18.432 Mhz&nbsp;&nbsp; Clock PHI:&nbsp; 36.864 Mhz&nbsp;&nbsp;
Effective:&nbsp; 29.10 Mhz<br>
<br>
I am not sure other than trying to use a 20mhz at 36mhz.&nbsp; I
probably will get a 33mhz chip.<br>
<br>
Anyway, this is an awesome fun board.&nbsp; Next onward to
Fuzix.&nbsp; (I am a Unix guy).&nbsp; <br>
<br>
Aug<br>
In Arkansas<o:p></o:p></p>
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John Coffman
2015-03-28 07:15:12 UTC
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Aug,<br>
<br>
You MUST be using the "advanced S-class processor" to use that value
oscillator.<br>
<br>
The serial baud rate will use the BRG; so if you select 19200, the
serial line will run at 19200.&nbsp; Only "standard" rates are selectable
in Setup:&nbsp; 1200, 2400, 9600, 38400, to name a few.&nbsp; The 80180 chip,
and the 8S180/SL1960 chip, both without the BRG, require an
oscillator at one of the "magic" frequencies.&nbsp; It is the latter chip
which I have labeled "retarded."<br>
<br>
0 wait state running may actually depend on the Flash/EPROM speed.&nbsp;
I'm using 70ns Flash, and the 28Mhz derived from that oscillator
with 2x clocking is the fastest I've been able to run at 0 w.s.<br>
<br>
FYI:&nbsp; all boot and Setup activity runs at 1/2 x clock and 3 w.s.&nbsp;
The upshift to the selected w.s. and clocking rate occurs at the end
of Setup.&nbsp; This includes adjusting the baud rate divisor to the new
CPU "phi" [clocking frequency].&nbsp; The line with the oscillator, CPU
clock, and effective speed is put out after the upshift.&nbsp; Then the
disk information comes out, &amp;c., &amp;c.<br>
<br>
--John<br>
<br>
P.S. -- before you install the new oscillator, be sure to enter
Setup and request a full initialization at 9600 on the next boot.&nbsp;
Failure to do so will result in the system not booting with the
changed oscillator.&nbsp; Oscillator frequency determination is done only
once and then stored in NVRAM.&nbsp; Likewise the determination of the
presence of the console device:&nbsp; PropIOv2 or Serial.<br>
<br>
<br>
<br>
On 03/27/2015 11:45 AM, AG5AT wrote:
<blockquote
cite="mid:aceebf2a-38e4-4fad-92f3-***@googlegroups.com"
type="cite">
<div dir="ltr">Hi John,<br>
<br>
I have a 14.31818 mhz oscillator now.&nbsp; What would the serial
baud rate bee for 2x clocking.&nbsp; I want to try at 0 wait states.<br>
<br>
Aug<br>
<br>
<br>
<br>
On Friday, March 13, 2015 at 2:16:10 PM UTC-5, John Coffman
wrote:
<blockquote class="gmail_quote" style="margin: 0pt 0pt 0pt
0.8ex; border-left: 1px solid rgb(204, 204, 204);
padding-left: 1ex;">
<div bgcolor="#ffffff" text="#000000"> Aug,<br>
<br>
The "Effective:&nbsp; XX.XXmhz" speed is an estimated performance
speed, assuming one could run with Zero wait states.<br>
<br>
With the 18.432Mhz oscillator at 2x overclocking, the
fastest anyone has been able to run is with 1 wait state.&nbsp;
In my testing, a 14.318Mhz oscillator, 2x clocking (28mhz),
is the fastest I have been able to run at 0 wait states.<br>
<br>
--John<br>
<br>
<br>
<br>
</div>
</blockquote>
</div>
</blockquote>
</body>
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AG5AT
2015-03-28 17:31:34 UTC
Permalink
Thanks John,


It all works and I am running with zero waits. Memory is brand new from
Mouser 55, rom is 70 flash as I originally installed.


Welcome to Single Board Computing on the N8VEM SBC Z180 Mark IV
running on a Z180 advanced S-class processor
with 512K of RAM and 512K of ROM
UNA BIOS version 1.00-17 of 01-Aug-2014. (6)

Do you wish to enter SETUP? [N/y]: y

Console serial line speed at next boot? [9600]:
Date read: Sat 03/28/2015
Date [mm/dd/yyyy]:
Time read: 12:25:56
Time [hh:mm[:ss]]:
Do detailed system setup? [N/y]: y
Is Home Computer N8-2312 in the system? [N/y]:
Configuring the Z180 SBC Mark IV board:
Trickle charge backup is Enabled.
1 diode is used. A 4K resistor is selected.
Diode (0,1,2) & Resistor (2,4,8) [d[+r]]:
CPU clock multiplier of 0..2 (0 means 1/2)? [2]:
Memory wait states (0..3)? [0]:
Input/Output wait states (1..4)? [1]:
First serial line baud rate? [9600]:
Number of data bits? [8]:
Parity options are:
1: No parity
2: Even
3: Odd
Parity option selected? [1]:
Number of stop bits (1..2)? [2]:
Use XON/XOFF protocol? [N/y]:
FDX twisted-pair baud rate? [57600]:
Number of data bits? [8]:
Parity options are:
1: No parity
2: Even
3: Odd
Parity option selected? [1]:
Number of stop bits (1..2)? [2]:
Use XON/XOFF protocol? [Y/n]:
Enable a RAMdisk? [Y/n]:
Enable a ROMdisk? [Y/n]:
Is the Master IDE device present? [Y/n]:
Is the Slave IDE device present? [N/y]:
Enable the Secure Digital Card? [Y/n]:
Is Multifunction/PIC in the system? [N/y]:
Is Propeller I/O in the system? [N/y]:
Is DiskI/O v3 in the system? [N/y]:
Is Dual IDE w/ Floppy in the system? [N/y]:
Is Dual SD card in the system? [N/y]:

Boot from R)OM or UNA unit 0..14? [R]:
Force full SETUP at [9600] bps on next boot? [N/y]:
The DS1302 non-volatile RAM has been updated.
Configuring the Z180 SBC Mark IV board:
Oscillator: 14.324 Mhz Clock PHI: 28.648 Mhz Effective: 28.62 Mhz

0: RAM- RAMdrive on the Z180 SBC Mark IV board
LBASupported UserAddressableSectors 832

1: ROM- ROMdrive on the Z180 SBC Mark IV board
LBASupported UserAddressableSectors 768

2: IDE- CF Card
s/n: B00D0729181212439117 fmw: Ver2.35
CHS: 995:16:63 nSectors 1002960 MaxBlkTransfer 1
LBASupported UserAddressableSectors 1002960

3: SD- SM FFFFF
s/n: 279486 fmw: 1.0 d/c: 2014-07
LBASupported UserAddressableSectors 498688

Boot UNA unit number or ROM? [R,X,0..3] (R):

N8VEM UNA CP/M (Will Sowerbutts, 2014-08-01 git cbed09)

Unit Disk Driver Capacity Slices Start LBA Flags
0 RAM0 Memory 416.0KB 1 0x00000000
1 ROM0 Memory 384.0KB 1 0x00000000
2 IDE0 Dual-IDE 489.7MB 1 0x0000003F MBR CPM
3 SD0 CSIO-SD 243.5MB 7 0x00000020 MBR CPM

Drive A: assigned to RAM0 slice 0
Drive B: assigned to ROM0 slice 0
Drive C: assigned to IDE0 slice 0
Drive D: assigned to SD0 slice 0

Loading Residual CP/M at 0xE100 ... done.
CP/M 2.2 Copyright 1979 (c) by Digital Research

A0>


Aug
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John Coffman
2015-03-28 18:23:50 UTC
Permalink
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
<html>
<head>
<meta content="text/html; charset=ISO-8859-1"
http-equiv="Content-Type">
</head>
<body bgcolor="#ffffff" text="#000000">
Aug,<br>
<br>
There is an advantage to running at 28Mhz, 0 w.s., rather than
36Mhz, 1 w.s.; namely, if you use I/O at 4 w.s., the PHI (CPU clock
speed) used to calculate the I/O timing is based on a slower clock,
so, depending upon your other peripherals, you may use older,
slower, chips.&nbsp; If you don't have any of these oldies, then cut the
I/O wait states to where everything works.<br>
<br>
--John<br>
<br>
<br>
<br>
<br>
On 03/28/2015 10:31 AM, AG5AT wrote:
<blockquote
cite="mid:89b65f63-083d-412a-b027-***@googlegroups.com"
type="cite">
<div dir="ltr">
<p id="yui_3_16_0_1_1427562943594_3589">Thanks John,</p>
<p id="yui_3_16_0_1_1427562943594_4944"><br>
</p>
<p id="yui_3_16_0_1_1427562943594_4943" data-setdir="false"
dir="ltr">It all works and I am running with zero waits.&nbsp;
Memory is brand new from Mouser&nbsp; 55, rom is 70 flash as I
originally installed.<br>
</p>
<p id="yui_3_16_0_1_1427562943594_4942" data-setdir="false"
dir="ltr"><br>
</p>
Welcome to Single Board Computing on the N8VEM SBC Z180 Mark IV<br
style="" class="">
&nbsp; running on a Z180 advanced S-class processor<br style=""
class="">
&nbsp; with 512K of RAM and 512K of ROM<br style="" class="">
UNA BIOS version 1.00-17 of
01-Aug-2014.&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (6)<br style=""
class="">
<br style="" class="">
Do you wish to enter SETUP? [N/y]: y<br style="" class="">
<br style="" class="">
Console serial line speed at next boot? [9600]: <br style=""
class="">
&nbsp;&nbsp;&nbsp; Date read:&nbsp; Sat 03/28/2015<br style="" class="">
&nbsp;&nbsp;&nbsp; Date [mm/dd/yyyy]: <br style="" class="">
&nbsp;&nbsp;&nbsp; Time read:&nbsp; 12:25:56<br style="" class="">
&nbsp;&nbsp;&nbsp; Time [hh:mm[:ss]]: <br style="" class="">
Do detailed system setup? [N/y]: y<br style="" class="">
Is Home Computer N8-2312 in the system? [N/y]: <br style=""
class="">
Configuring the Z180 SBC Mark IV board:<br style="" class="">
&nbsp;&nbsp;&nbsp; Trickle charge backup is Enabled.<br style="" class="">
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 1 diode is used.&nbsp; A 4K resistor is selected.<br style=""
class="">
&nbsp;&nbsp;&nbsp; Diode (0,1,2) &amp; Resistor (2,4,8) [d[+r]]: <br style=""
class="">
&nbsp;&nbsp;&nbsp; CPU clock multiplier of 0..2 (0 means 1/2)? [2]: <br
style="" class="">
&nbsp;&nbsp;&nbsp; Memory wait states (0..3)? [0]: <br style="" class="">
&nbsp;&nbsp;&nbsp; Input/Output wait states (1..4)? [1]: <br style="" class="">
&nbsp;&nbsp;&nbsp; First serial line baud rate? [9600]: <br style="" class="">
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Number of data bits? [8]: <br style="" class="">
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Parity options are:<br style="" class="">
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 1: No parity<br style="" class="">
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 2: Even<br style="" class="">
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 3: Odd<br style="" class="">
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Parity option selected? [1]: <br style="" class="">
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Number of stop bits (1..2)? [2]: <br style="" class="">
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Use XON/XOFF protocol? [N/y]: <br style="" class="">
&nbsp;&nbsp;&nbsp; FDX twisted-pair baud rate? [57600]: <br style="" class="">
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Number of data bits? [8]: <br style="" class="">
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Parity options are:<br style="" class="">
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 1: No parity<br style="" class="">
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 2: Even<br style="" class="">
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 3: Odd<br style="" class="">
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Parity option selected? [1]: <br style="" class="">
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Number of stop bits (1..2)? [2]: <br style="" class="">
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Use XON/XOFF protocol? [Y/n]: <br style="" class="">
&nbsp;&nbsp;&nbsp; Enable a RAMdisk? [Y/n]: <br style="" class="">
&nbsp;&nbsp;&nbsp; Enable a ROMdisk? [Y/n]: <br style="" class="">
&nbsp;&nbsp;&nbsp; Is the Master IDE device present? [Y/n]: <br style=""
class="">
&nbsp;&nbsp;&nbsp; Is the Slave IDE device present? [N/y]: <br style=""
class="">
&nbsp;&nbsp;&nbsp; Enable the Secure Digital Card? [Y/n]: <br style=""
class="">
Is Multifunction/PIC in the system? [N/y]: <br style=""
class="">
Is Propeller I/O in the system? [N/y]: <br style="" class="">
Is DiskI/O v3 in the system? [N/y]: <br style="" class="">
Is Dual IDE w/ Floppy in the system? [N/y]: <br style=""
class="">
Is Dual SD card in the system? [N/y]: <br style="" class="">
<br style="" class="">
Boot from R)OM or UNA unit 0..14? [R]: <br style="" class="">
Force full SETUP at [9600] bps on next boot? [N/y]: <br
style="" class="">
The DS1302 non-volatile RAM has been updated.<br style=""
class="">
Configuring the Z180 SBC Mark IV board:<br style="" class="">
Oscillator:&nbsp; 14.324 Mhz&nbsp;&nbsp; Clock PHI:&nbsp; 28.648 Mhz&nbsp;&nbsp; Effective:&nbsp;
28.62 Mhz<br style="" class="">
<br style="" class="">
0: RAM-&nbsp; RAMdrive on the Z180 SBC Mark IV board<br style=""
class="">
LBASupported&nbsp;&nbsp;&nbsp; UserAddressableSectors 832<br style="" class="">
<br style="" class="">
1: ROM-&nbsp; ROMdrive on the Z180 SBC Mark IV board<br style=""
class="">
LBASupported&nbsp;&nbsp;&nbsp; UserAddressableSectors 768<br style="" class="">
<br style="" class="">
2: IDE-&nbsp; CF Card&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <br style=""
class="">
s/n:&nbsp; B00D0729181212439117&nbsp;&nbsp; fmw:&nbsp; Ver2.35 <br style=""
class="">
CHS: 995:16:63&nbsp;&nbsp;&nbsp;&nbsp; nSectors 1002960&nbsp;&nbsp;&nbsp;&nbsp; MaxBlkTransfer 1<br
style="" class="">
LBASupported&nbsp;&nbsp;&nbsp; UserAddressableSectors 1002960<br style=""
class="">
<br style="" class="">
3:&nbsp; SD-&nbsp; SM&nbsp; FFFFF<br style="" class="">
s/n:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 279486&nbsp;&nbsp; fmw:&nbsp; 1.0&nbsp;&nbsp; d/c:&nbsp; 2014-07<br style=""
class="">
LBASupported&nbsp;&nbsp;&nbsp; UserAddressableSectors 498688<br style=""
class="">
<br style="" class="">
Boot UNA unit number or ROM? [R,X,0..3] (R): <br style=""
class="">
<br style="" class="">
N8VEM UNA CP/M (Will Sowerbutts, 2014-08-01 git cbed09)<br
style="" class="">
<br style="" class="">
Unit Disk&nbsp; Driver&nbsp;&nbsp; Capacity&nbsp; Slices&nbsp;&nbsp; Start LBA&nbsp; Flags<br
style="" class="">
0&nbsp;&nbsp;&nbsp; RAM0&nbsp; Memory&nbsp;&nbsp;&nbsp; 416.0KB&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 1&nbsp; 0x00000000&nbsp; <br style=""
class="">
1&nbsp;&nbsp;&nbsp; ROM0&nbsp; Memory&nbsp;&nbsp;&nbsp; 384.0KB&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 1&nbsp; 0x00000000&nbsp; <br style=""
class="">
2&nbsp;&nbsp;&nbsp; IDE0&nbsp; Dual-IDE&nbsp; 489.7MB&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 1&nbsp; 0x0000003F&nbsp; MBR CPM <br
style="" class="">
3&nbsp;&nbsp;&nbsp; SD0&nbsp;&nbsp; CSIO-SD&nbsp;&nbsp; 243.5MB&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 7&nbsp; 0x00000020&nbsp; MBR CPM <br
style="" class="">
<br style="" class="">
Drive A: assigned to RAM0 slice 0<br style="" class="">
Drive B: assigned to ROM0 slice 0<br style="" class="">
Drive C: assigned to IDE0 slice 0<br style="" class="">
Drive D: assigned to SD0 slice 0<br style="" class="">
<br style="" class="">
Loading Residual CP/M at 0xE100 ... done.<br style="" class="">
CP/M 2.2 Copyright 1979 (c) by Digital Research<br style=""
class="">
<br style="" class="">
A0&gt;<br>
<br>
<br>
Aug<br>
<br>
</div>
</blockquote>
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Kip Koon
2015-03-14 04:06:13 UTC
Permalink
Hi AG5AT,

Awesome! Congratulations on getting the Mark IV up and running. I’m a few chips away before I will be able to see my Mark IV boot up and say “Hello Daddy!”. :) I can hardly wait, but I have quite a few things going on at the moment that is requiring my attention. Hopefully soon.



Kip Koon

***@sc.rr.com

http://www.cocopedia.com/wiki/index.php/Kip_Koon





From: ***@googlegroups.com [mailto:***@googlegroups.com] On Behalf Of AG5AT
Sent: Thursday, March 12, 2015 8:57 PM
To: ***@googlegroups.com
Subject: [N8VEM: 19365] New Mark IV UP



All,

I have gotten my new Mark IV up and running. Well once I figured out that the serial cable isn't the same as the N8VEM boards. Once I figured that out, it just came up and ran. Before figuring out the Blinky Blinky from John's Test instructions, I wasn't sure what wasn't right. I knew it was sort of running because the SD card light was blinking. Well I found out my red/green led from chicken shack was "backwards". Red was RUN.. So I turned it around, all fine.

It is built with all AHCT chips as I did my Zeta, although I will probably have to replace U25 with an LS240.

I started out with a 10mhz Z180 and a 9.216mhz clock. That worked fine.. (1x clock, 0 wait, 1 i/o wait). I then stuck an 18.432mhz clock in (still 1x, 0 wait, 1 i/o) and it ran.
Next was getting an SD card running. Wandered thru Will's UNA instructions a few time, and went ahead and put a partition on a 256mb SD, all went well.
Onward to IDE CF card. All worked fine.

Next tried overclocking.... It didn't work. So I put a 20 mhz chip in. Same results. So I added one memory wait.

Welcome to Single Board Computing on the N8VEM SBC Z180 Mark IV
running on a Z180 advanced S-class processor
with 512K of RAM and 512K of ROM
UNA BIOS version 1.00-17 of 01-Aug-2014. (6)

Do you wish to enter SETUP? [N/y]:
Configuring the Z180 SBC Mark IV board:
Oscillator: 18.432 Mhz Clock PHI: 36.864 Mhz Effective: 29.10 Mhz

I am not sure other than trying to use a 20mhz at 36mhz. I probably will get a 33mhz chip.

Anyway, this is an awesome fun board. Next onward to Fuzix. (I am a Unix guy).

Aug
In Arkansas
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