Discussion:
[N8VEM: 18326] ECB backplane design
Frank Vanderydt
2014-06-24 15:20:14 UTC
Permalink
Hi,

I'm trying to design a 3U backplane for ECB, but i'm wondering, do I need
active termination?

I've found an example in the S100 backplane, with the LM2450 and this is
low terminated 2.7V.

I also found an example of a VME active termination using UC563 32 lines
VME bias generator, the voltage used is 2.94V.
It's only 3x DIL8 and a lot of resistor networks.
Each chip takes care of 32 lines and 3 chips are needed at every side
(beginning and end)

Anyone got ideas about that ? The backplane will be 43.5cm (17.1")

Regards,

Frank




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Nikolay Dimitrov
2014-06-24 15:55:15 UTC
Permalink
Hi Frank,

Unless your bus lines were explicitly designed and implemented as
transmission lines and the line driver and line load have the same
controlled impedance as the bus, I doubt that adding termination will
benefit your system at all.

Kind regards,
Nikolay
Frank Vanderydt
2014-06-24 19:54:47 UTC
Permalink
Edward Snider
2014-06-25 04:18:11 UTC
Permalink
Hi Frank,

How many slots are you going for?

Ed


On Tuesday, June 24, 2014 10:20:14 AM UTC-5, Frank Vanderydt wrote:
>
> Hi,
>
> I'm trying to design a 3U backplane for ECB, but i'm wondering, do I need
> active termination?
>
> I've found an example in the S100 backplane, with the LM2450 and this is
> low terminated 2.7V.
>
> I also found an example of a VME active termination using UC563 32 lines
> VME bias generator, the voltage used is 2.94V.
> It's only 3x DIL8 and a lot of resistor networks.
> Each chip takes care of 32 lines and 3 chips are needed at every side
> (beginning and end)
>
> Anyone got ideas about that ? The backplane will be 43.5cm (17.1")
>
> Regards,
>
> Frank
>
>
>
>
>

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d***@public.gmane.org
2014-06-25 04:52:26 UTC
Permalink
Nikolay Dimitrov
2014-06-25 14:09:51 UTC
Permalink
Gents, if you allow me some kind remarks.

If you put a resistor on a signal line, it will only absorb the line
energy when the resistor impedance is close to the line impedance, and
this means that the line impedance should be known. Otherwise it will
cause reflection. Yes, the reflection could be smaller than the open-end
reflection, but it's hard to call such random termination "impedance
matched". The other issue that causes reflections is impedance
variations along the line, which can be caused by both physical changes
in the line itself and also because of board attachment (which is usual
for a back-plane), and this one is next to impossible to prevent
post-factum (with existing back-plane and extension boards).

As far as I know (looking at the PCB layout), N8VEM backplane is not a
bus with controlled and known impedance. Attaching boards to the
back-plane causes the bus load to be both different on the different
signal lines, and also different across each line. Attaching some
resistors here and there to absorb energy **can** help, but my personal
opinion is that this is a temporary solution, as soon as you change the
number and position of the boards, you'll need to test another resistor
termination.

PS: Btw, PCI bus used reflected-wave switching where the lines were
intentionally left without terminations, but as far as I know there was
also ground-plane used extensively.
PS2: If someone is really interested, I can put my 8-slot backplane in
time-domain reflectometry setup and share screenshots of the measurements.

Kind regards,
Nikolay
John Coffman
2014-06-25 18:10:19 UTC
Permalink
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Another way to figure whether termination is needed is to figure the
time it takes for reflections to damp out.&nbsp; PCB signals travel at,
very approximately, 1/2 the speed of light.&nbsp; This is about 1' in
2ns.&nbsp; Figure that reflections are probably adequately damped in 3
traverses of the board.&nbsp; An 8 slot backplane is about 6" long, so 3
traverses of the board occur in 3ns.&nbsp; So, it may take this length of
time for very fast signals to stabilize.<br>
<br>
A 12 slot backplane is 11 x 0.8" = about 9", or 1.5ns.&nbsp; Times 3, is
4.5ns, call it 5ns for a very fast signal transition to reflect
&amp; stabilize.<br>
<br>
Terminations on an N8VEM 8 or 12 slot backplane are probably
overkill for LS-TTL or HC speed logic.<br>
<br>
--John<br>
<br>
<br>
<br>
<br>
On 06/25/2014 07:09 AM, Nikolay Dimitrov wrote:
<blockquote cite="mid:53AAD82F.9030804-***@public.gmane.org" type="cite">Gents,
if you allow me some kind remarks.
<br>
<br>
If you put a resistor on a signal line, it will only absorb the
line energy when the resistor impedance is close to the line
impedance, and this means that the line impedance should be known.
Otherwise it will cause reflection. Yes, the reflection could be
smaller than the open-end reflection, but it's hard to call such
random termination "impedance matched". The other issue that
causes reflections is impedance variations along the line, which
can be caused by both physical changes in the line itself and also
because of board attachment (which is usual for a back-plane), and
this one is next to impossible to prevent post-factum (with
existing back-plane and extension boards).
<br>
<br>
As far as I know (looking at the PCB layout), N8VEM backplane is
not a bus with controlled and known impedance. Attaching boards to
the back-plane causes&nbsp; the bus load to be both different on the
different signal lines, and also different across each line.
Attaching some resistors here and there to absorb energy **can**
help, but my personal opinion is that this is a temporary
solution, as soon as you change the number and position of the
boards, you'll need to test another resistor termination.
<br>
<br>
PS: Btw, PCI bus used reflected-wave switching where the lines
were intentionally left without terminations, but as far as I know
there was also ground-plane used extensively.
<br>
PS2: If someone is really interested, I can put my 8-slot
backplane in time-domain reflectometry setup and share screenshots
of the measurements.
<br>
<br>
Kind regards,
<br>
Nikolay
<br>
<br>
</blockquote>
</body>
</html>

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