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There is at least one problem on the PCB: the conduction area on
the top layer within P7 (SDcard) should be a hole in the ground
plane instead. It is a conduction area only during trace routing,
serving as a keep-out area. On the finished board it is an area of
no-traces to satisify the footprints of some SD sockets.<br>
<br>
I really wish Kicad had a better way of handling this situation.<br>
<br>
--John<br>
<br>
<br>
<br>
On 04/20/2014 05:58 AM, Andrew Lynch wrote:
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<p class="MsoNormal">Hi<o:p></o:p></p>
<p class="MsoNormal">I uploaded the latest file set for the 6x0x
to the wiki. I think this board is ready for production.
Thanks and have a nice day!<br>
<br>
Andrew Lynch<o:p></o:p></p>
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