[N8VEM: 17586] Digest for n8vem-/[e-mail] - 10 Messages in 1 Topic

[Nikolay Dimitrov]

Hi Alan,

Some of the pins are optimized for a special purpose, like Global Set,
Global Reset, Global Clock.
Other pins can be used for similar purpose, but it would be generally
harder to meet timing requirements
(which doesn't mean only clocks speeds, but also aligning clock edges so
they can arrive at the same
time to different blocks).

I would kindly recommend to use GCLK inputs for system clocks.

Regards,
picmaster

FPGA's really don't have reserved pins except for JTAG and serial
programming interfaces. Even if a pin is designated as a high speed edge
input to the clock tree or a PLL, you can still route it in on any other
pin. Just just take a propagation delay hit. That's the nice thing about
programmable logic. You can make boards level changes with a text editor
and not a soldering iron.
-Alan