[N8VEM: 19884] ECB KISS-68030 CPU status -- UP!

[John Coffman]

The prototype of the MC68030 CPU board has passed all of the memory
tests I can throw at it.

The DRAM is operational with both EDO and FPM memories. The photo I
uploaded a few minutes ago shows double-sided FPM modules with parity.
The board does not use the parity bits, so the extra chip on each side
of the SIMM is unnecessary. The sensing of a double/single sided SIMM
in slot A works.

The board is not yet tested with larger SIMMs (64Mb ss, 128Mb ds) for a
max. memory of 256Mb.

Those building the board are advised that there is an update to the .JED
files for one of the GAL22V10's.

--John

Photo:
Loading Image...

[John Coffman]

Builders of the KISS-68030:

Please note the update to the Parts List (BOM) on the Wiki. The
electrolytic decoupling caps would be best if they were of higher value.

--John

Yikes. Sorry to hear about the back.
Thanks for letting me know about the caps.
Looks like I am going to still be short of some parts this weekend,
but can can get started. Should be able to complete the assembly the
following weekend.
--Wayne

That is great John.Ã, Amazing how quickly you got it up and
running!

Although the board was built up in 3 soldering sessions, I think
that is what started the backache. Concentrating on the memory
test programming yesterday did not help. After 3 miles down in
the canyon park, lots of hot water in the shower, and a good dose
of aspirin, I think I am beginning to feel human again.
BTW:Â I just updated the parts list to recommend larger
electrolytic decoupling caps.
--John