Discussion:
[N8VEM: 19713] Grant Searle's multicomputer revisited; the CP/M 3 update
RHKoolaap
2015-06-23 16:04:25 UTC
Permalink
the previously described configuration can now boot CP/M 3.0 too.
Only 128 kilobyte SRAM is needed for it to work.
The bios supports 3 disks (A:, B: and C: which use the same layout as
previously used (Grant's disk A:). Again all (max 240-ish) available
volumes (slices, partitions ....) can be mounted to these drives with the
included tool.
With ?xmove implemented, all buffers are located in bank 0 or bank 2,
making 61k available as TPA.
There is no RAM drive as I wanted to stay within the 128 kB SRAM and
besides, having 120-240 8 MB fast volumes available makes a 384 kB ramdrive
a bit silly IMHO. My aim was maximizing the TPA size.
The BIOS is developed on the multicomp itself with the standard tools RMAC
and LINK v1.31
All sources are included in the below package. You will find all you need
to (re)build the the FGPA, ROM and OS'ses therein. (that is except for the
Quartus II software. )

I just finished the package, and even though everything seems to work fine,
I'm not guaranteeing anything.

Please find the package here:
http://www.filedropper.com/filemanager/public.php?service=files&t=614dcb7089fb14a4657ae493a707f9df

(it stays alive for a month. If you find it gone, please let me know and
I'll upload it again)

have fun, RHK
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Kip Koon
2015-06-23 19:29:37 UTC
Permalink
Hi RHKoolaap,

Thank you for all your hard work! I respect your desire for keeping to the 128KB Static Ram specification that Grant Searle used on his original design for the Multicomp. I certainly understand why you did that. I really do. I was wondering since James Moxham’s Multicomp PCB has the ability to have at least 512KB of Static Ram available to the system with a maximum of 1MB, I was wondering if you would be willing to update CP/M 3.0 and MP/M for that matter to have the ability to run as many multiple tasks that the ram can hold.

I have only one 512KB Static Ram chip on all my Multicomps simply because no one has implemented anything that used the rest as of yet anyway. Since the Multicomp PCB does exist and is available and has a minimum static ram memory size of 512KB with a maximum size of 1MB, I don’t see why we can’t use it all. You could have both versions available for people so they can go either way. I’d just like to see all of the ram utilized in some way. Just in case you have not heard of the Multicomp PCB, here’s a link to purchase one from James Moxham for only $16.

< http://www.smarthome.jigsy.com/fpga>

Ideas, thoughts, poseurs? Thank you for listening (reading). :) Take care my friend.



Kip Koon

***@sc.rr.com

http://www.cocopedia.com/wiki/index.php/Kip_Koon





From: ***@googlegroups.com [mailto:***@googlegroups.com] On Behalf Of RHKoolaap
Sent: Tuesday, June 23, 2015 12:04 PM
To: ***@googlegroups.com
Subject: [N8VEM: 19713] Grant Searle's multicomputer revisited; the CP/M 3 update



the previously described configuration can now boot CP/M 3.0 too.

Only 128 kilobyte SRAM is needed for it to work.

The bios supports 3 disks (A:, B: and C: which use the same layout as previously used (Grant's disk A:). Again all (max 240-ish) available volumes (slices, partitions ....) can be mounted to these drives with the included tool.

With ?xmove implemented, all buffers are located in bank 0 or bank 2, making 61k available as TPA.

There is no RAM drive as I wanted to stay within the 128 kB SRAM and besides, having 120-240 8 MB fast volumes available makes a 384 kB ramdrive a bit silly IMHO. My aim was maximizing the TPA size.

The BIOS is developed on the multicomp itself with the standard tools RMAC and LINK v1.31

All sources are included in the below package. You will find all you need to (re)build the the FGPA, ROM and OS'ses therein. (that is except for the Quartus II software. )



I just finished the package, and even though everything seems to work fine, I'm not guaranteeing anything.



Please find the package here:

http://www.filedropper.com/filemanager/public.php?service=files <http://www.filedropper.com/filemanager/public.php?service=files&t=614dcb7089fb14a4657ae493a707f9df> &t=614dcb7089fb14a4657ae493a707f9df



(it stays alive for a month. If you find it gone, please let me know and I'll upload it again)



have fun, RHK
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RHKoolaap
2015-06-23 20:43:53 UTC
Permalink
Hi Kip
it is really easy to assign more memory to CP/M 3. GENCPM allows for max 15
extra memory segments to be included (bank '1' does not count). You just
regenerate CPM3.sys specifying more pages of memory to be available. For
512 K that should be 15 pages (enter F for the question " Number of memory
segments (#2) ? ". Put the new cpm3.sys in place of the old one and you're
done. 5 minutes work, no coding is required.

MP/M is a different matter. I' haven't looked into that yet.

be well, RHK
Post by Kip Koon
Hi RHKoolaap,
Thank you for all your hard work! I respect your desire for keeping to
the 128KB Static Ram specification that Grant Searle used on his original
design for the Multicomp. I certainly understand why you did that. I
really do. I was wondering since James Moxham’s Multicomp PCB has the
ability to have at least 512KB of Static Ram available to the system with a
maximum of 1MB, I was wondering if you would be willing to update CP/M 3.0
and MP/M for that matter to have the ability to run as many multiple tasks
that the ram can hold.
I have only one 512KB Static Ram chip on all my Multicomps simply because
no one has implemented anything that used the rest as of yet anyway. Since
the Multicomp PCB does exist and is available and has a minimum static ram
memory size of 512KB with a maximum size of 1MB, I don’t see why we can’t
use it all. You could have both versions available for people so they can
go either way. I’d just like to see all of the ram utilized in some way.
Just in case you have not heard of the Multicomp PCB, here’s a link to
purchase one from James Moxham for only $16.
< http://www.smarthome.jigsy.com/fpga>
Ideas, thoughts, poseurs? Thank you for listening (reading). :) Take care my friend.
Kip Koon
http://www.cocopedia.com/wiki/index.php/Kip_Koon
*Sent:* Tuesday, June 23, 2015 12:04 PM
*Subject:* [N8VEM: 19713] Grant Searle's multicomputer revisited; the
CP/M 3 update
the previously described configuration can now boot CP/M 3.0 too.
Only 128 kilobyte SRAM is needed for it to work.
The bios supports 3 disks (A:, B: and C: which use the same layout as
previously used (Grant's disk A:). Again all (max 240-ish) available
volumes (slices, partitions ....) can be mounted to these drives with the
included tool.
With ?xmove implemented, all buffers are located in bank 0 or bank 2,
making 61k available as TPA.
There is no RAM drive as I wanted to stay within the 128 kB SRAM and
besides, having 120-240 8 MB fast volumes available makes a 384 kB ramdrive
a bit silly IMHO. My aim was maximizing the TPA size.
The BIOS is developed on the multicomp itself with the standard tools RMAC and LINK v1.31
All sources are included in the below package. You will find all you need
to (re)build the the FGPA, ROM and OS'ses therein. (that is except for the
Quartus II software. )
I just finished the package, and even though everything seems to work
fine, I'm not guaranteeing anything.
http://www.filedropper.com/filemanager/public.php?service=files&t=614dcb7089fb14a4657ae493a707f9df
(it stays alive for a month. If you find it gone, please let me know and
I'll upload it again)
have fun, RHK
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Kip Koon
2015-06-24 10:35:59 UTC
Permalink
Hi RHKoolaap,

Thank you so much for the instructions. The way you describe the procedure sounds simple. Will the new CPM3.sys file be put automatically in place of the original file and update the boot sector with the starting sector number or is there a whole procedure I need to know? As you can tell I have not done much with CPM or MPM for that matter. I just want to make sure I don’t make a mistake. Thanks a bunch!



Kip Koon

***@sc.rr.com

http://www.cocopedia.com/wiki/index.php/Kip_Koon





From: ***@googlegroups.com [mailto:***@googlegroups.com] On Behalf Of RHKoolaap
Sent: Tuesday, June 23, 2015 4:44 PM
To: ***@googlegroups.com
Subject: Re: [N8VEM: 19716] Grant Searle's multicomputer revisited; the CP/M 3 update





Hi Kip

it is really easy to assign more memory to CP/M 3. GENCPM allows for max 15 extra memory segments to be included (bank '1' does not count). You just regenerate CPM3.sys specifying more pages of memory to be available. For 512 K that should be 15 pages (enter F for the question " Number of memory segments (#2) ? ". Put the new cpm3.sys in place of the old one and you're done. 5 minutes work, no coding is required.



MP/M is a different matter. I' haven't looked into that yet.



be well, RHK


On Tuesday, June 23, 2015 at 9:29:48 PM UTC+2, computerdoc wrote:

Hi RHKoolaap,

Thank you for all your hard work! I respect your desire for keeping to the 128KB Static Ram specification that Grant Searle used on his original design for the Multicomp. I certainly understand why you did that. I really do. I was wondering since James Moxham’s Multicomp PCB has the ability to have at least 512KB of Static Ram available to the system with a maximum of 1MB, I was wondering if you would be willing to update CP/M 3.0 and MP/M for that matter to have the ability to run as many multiple tasks that the ram can hold.

I have only one 512KB Static Ram chip on all my Multicomps simply because no one has implemented anything that used the rest as of yet anyway. Since the Multicomp PCB does exist and is available and has a minimum static ram memory size of 512KB with a maximum size of 1MB, I don’t see why we can’t use it all. You could have both versions available for people so they can go either way. I’d just like to see all of the ram utilized in some way. Just in case you have not heard of the Multicomp PCB, here’s a link to purchase one from James Moxham for only $16.

< http://www.smarthome.jigsy.com/fpga>

Ideas, thoughts, poseurs? Thank you for listening (reading). :) Take care my friend.



Kip Koon

***@sc.rr.com <javascript:>

http://www.cocopedia.com/wiki/index.php/Kip_Koon





From: ***@googlegroups.com <javascript:> [mailto:***@googlegroups.com <javascript:> ] On Behalf Of RHKoolaap
Sent: Tuesday, June 23, 2015 12:04 PM
To: ***@googlegroups.com <javascript:>
Subject: [N8VEM: 19713] Grant Searle's multicomputer revisited; the CP/M 3 update



the previously described configuration can now boot CP/M 3.0 too.

Only 128 kilobyte SRAM is needed for it to work.

The bios supports 3 disks (A:, B: and C: which use the same layout as previously used (Grant's disk A:). Again all (max 240-ish) available volumes (slices, partitions ....) can be mounted to these drives with the included tool.

With ?xmove implemented, all buffers are located in bank 0 or bank 2, making 61k available as TPA.

There is no RAM drive as I wanted to stay within the 128 kB SRAM and besides, having 120-240 8 MB fast volumes available makes a 384 kB ramdrive a bit silly IMHO. My aim was maximizing the TPA size.

The BIOS is developed on the multicomp itself with the standard tools RMAC and LINK v1.31

All sources are included in the below package. You will find all you need to (re)build the the FGPA, ROM and OS'ses therein. (that is except for the Quartus II software. )



I just finished the package, and even though everything seems to work fine, I'm not guaranteeing anything.



Please find the package here:

http://www.filedropper.com/filemanager/public.php?service=files <http://www.filedropper.com/filemanager/public.php?service=files&t=614dcb7089fb14a4657ae493a707f9df> &t=614dcb7089fb14a4657ae493a707f9df



(it stays alive for a month. If you find it gone, please let me know and I'll upload it again)



have fun, RHK
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RHKoolaap
2015-06-24 11:25:45 UTC
Permalink
the way CP/M 3 loads is as follows:
the ROM loads the CPMLoader program from the system tracks, installs that
in low memory. and starts execution of the loader.
This in turn loads the file CPM3.sys from disk and installs this in high
memory. CPM3-sys is a bunch of code segments (4 in case of a banked system)
which will be loaded either in common memory (above the banks) or in bank
0. then control is given to the BIOS BOOT segment which will load CCP.COM
from disk to memory address 0100h in bank 1
The CPM3.SYS file contains the whole OS (except CCP.COM)

the GENCPM.COM program builds the CPM3.SYS file from the DR .SPR files and
the BNKBIOS3.SPR that you create from the .REL files from the custom BIOS
build.
only then will be determined where the codesegments are loaded, where the
buffers go and how the paging is organized. This data is stored in the
CPM3.SYS file.

Back to your question. If you run GENCPM from user0 the new CPM3.SYS will
replace the old one and that is all you need. the system is not stored on
the system tracks, that is where the loader program resides, which does not
change.

if you installed the 4disk image this is the complete instruction:
*<reset>*
*S3* (start CPM/3)
*set rmac.com [sys*
*set link.com [sys*
*set gencpm [sys *
*set ppip.com [sys* ( this makes these programs available from all user
areas)
*3: * (switch to user area 3)
*RMAC bioskrnl* (makes BIOSKRNL.REL)
*RMAC boot (makes BOOT.REL)*
*RMAC chario (makes CHARIO.REL)*
*RMAC drvtbl( makes DRVTBL.REL)*
*RMAC move*
*RMAC scb*
*RMAC disk * (you just assembled the user bios part)
*LINK BNKBIOS3[B]=BIOSKRNL,SCB,BOOT,CHARIO,MOVE,DRVTBL,DISK*
*GENCPM*
answer all the questions. You can accept all the defaults until:
*Number of memory segments (#2) ?* say* F* (gencpm defaults to hexadecimal
input)
then accept all the remaining defaults. you will be reprimanded on
segments 3-15 (the default is C0 and should be 80 but the program corrects
that itself
after the final 'y', the new CPM3.SYS is generated. copy this to user 0
*PPIP cpm3.sys 0: /e*

and you are done.
Post by Kip Koon
Hi RHKoolaap,
Thank you so much for the instructions. The way you describe the
procedure sounds simple. Will the new CPM3.sys file be put automatically
in place of the original file and update the boot sector with the starting
sector number or is there a whole procedure I need to know? As you can
tell I have not done much with CPM or MPM for that matter. I just want to
make sure I don’t make a mistake. Thanks a bunch!
Kip Koon
http://www.cocopedia.com/wiki/index.php/Kip_Koon
*Sent:* Tuesday, June 23, 2015 4:44 PM
*Subject:* Re: [N8VEM: 19716] Grant Searle's multicomputer revisited; the
CP/M 3 update
Hi Kip
it is really easy to assign more memory to CP/M 3. GENCPM allows for max
15 extra memory segments to be included (bank '1' does not count). You
just regenerate CPM3.sys specifying more pages of memory to be available.
For 512 K that should be 15 pages (enter F for the question " Number of
memory segments (#2) ? ". Put the new cpm3.sys in place of the old one and
you're done. 5 minutes work, no coding is required.
MP/M is a different matter. I' haven't looked into that yet.
be well, RHK
Hi RHKoolaap,
Thank you for all your hard work! I respect your desire for keeping to
the 128KB Static Ram specification that Grant Searle used on his original
design for the Multicomp. I certainly understand why you did that. I
really do. I was wondering since James Moxham’s Multicomp PCB has the
ability to have at least 512KB of Static Ram available to the system with a
maximum of 1MB, I was wondering if you would be willing to update CP/M 3.0
and MP/M for that matter to have the ability to run as many multiple tasks
that the ram can hold.
I have only one 512KB Static Ram chip on all my Multicomps simply because
no one has implemented anything that used the rest as of yet anyway. Since
the Multicomp PCB does exist and is available and has a minimum static ram
memory size of 512KB with a maximum size of 1MB, I don’t see why we can’t
use it all. You could have both versions available for people so they can
go either way. I’d just like to see all of the ram utilized in some way.
Just in case you have not heard of the Multicomp PCB, here’s a link to
purchase one from James Moxham for only $16.
< http://www.smarthome.jigsy.com/fpga>
Ideas, thoughts, poseurs? Thank you for listening (reading). :) Take care my friend.
Kip Koon
http://www.cocopedia.com/wiki/index.php/Kip_Koon
Of *RHKoolaap
*Sent:* Tuesday, June 23, 2015 12:04 PM
*Subject:* [N8VEM: 19713] Grant Searle's multicomputer revisited; the
CP/M 3 update
the previously described configuration can now boot CP/M 3.0 too.
Only 128 kilobyte SRAM is needed for it to work.
The bios supports 3 disks (A:, B: and C: which use the same layout as
previously used (Grant's disk A:). Again all (max 240-ish) available
volumes (slices, partitions ....) can be mounted to these drives with the
included tool.
With ?xmove implemented, all buffers are located in bank 0 or bank 2,
making 61k available as TPA.
There is no RAM drive as I wanted to stay within the 128 kB SRAM and
besides, having 120-240 8 MB fast volumes available makes a 384 kB ramdrive
a bit silly IMHO. My aim was maximizing the TPA size.
The BIOS is developed on the multicomp itself with the standard tools RMAC and LINK v1.31
All sources are included in the below package. You will find all you need
to (re)build the the FGPA, ROM and OS'ses therein. (that is except for the
Quartus II software. )
I just finished the package, and even though everything seems to work
fine, I'm not guaranteeing anything.
http://www.filedropper.com/filemanager/public.php?service=files&t=614dcb7089fb14a4657ae493a707f9df
(it stays alive for a month. If you find it gone, please let me know and
I'll upload it again)
have fun, RHK
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Kip Koon
2015-06-25 00:57:43 UTC
Permalink
Hi RHKoolaap,

Fantastic! Thank you so much. I will try this out as soon I can afford to get some more SD Cards. I used the last one getting the 4 environment 6809 Multicomp running. :) That is to say CamelForth, Basic, Cubix and Flex all running from the same SD Card. I love it! Thanks again my friend.



Kip Koon

***@sc.rr.com

http://www.cocopedia.com/wiki/index.php/Kip_Koon





From: ***@googlegroups.com [mailto:***@googlegroups.com] On Behalf Of RHKoolaap
Sent: Wednesday, June 24, 2015 7:26 AM
To: ***@googlegroups.com
Subject: Re: [N8VEM: 19722] Grant Searle's multicomputer revisited; the CP/M 3 update



the way CP/M 3 loads is as follows:

the ROM loads the CPMLoader program from the system tracks, installs that in low memory. and starts execution of the loader.

This in turn loads the file CPM3.sys from disk and installs this in high memory. CPM3-sys is a bunch of code segments (4 in case of a banked system) which will be loaded either in common memory (above the banks) or in bank 0. then control is given to the BIOS BOOT segment which will load CCP.COM from disk to memory address 0100h in bank 1

The CPM3.SYS file contains the whole OS (except CCP.COM)



the GENCPM.COM program builds the CPM3.SYS file from the DR .SPR files and the BNKBIOS3.SPR that you create from the .REL files from the custom BIOS build.

only then will be determined where the codesegments are loaded, where the buffers go and how the paging is organized. This data is stored in the CPM3.SYS file.



Back to your question. If you run GENCPM from user0 the new CPM3.SYS will replace the old one and that is all you need. the system is not stored on the system tracks, that is where the loader program resides, which does not change.



if you installed the 4disk image this is the complete instruction:

<reset>

S3 (start CPM/3)

set rmac.com [sys

set link.com [sys

set gencpm [sys

set ppip.com [sys ( this makes these programs available from all user areas)

3: (switch to user area 3)

RMAC bioskrnl (makes BIOSKRNL.REL)

RMAC boot (makes BOOT.REL)

RMAC chario (makes CHARIO.REL)

RMAC drvtbl( makes DRVTBL.REL)

RMAC move

RMAC scb

RMAC disk (you just assembled the user bios part)

LINK BNKBIOS3[B]=BIOSKRNL,SCB,BOOT,CHARIO,MOVE,DRVTBL,DISK

GENCPM

answer all the questions. You can accept all the defaults until:

Number of memory segments (#2) ? say F (gencpm defaults to hexadecimal input)

then accept all the remaining defaults. you will be reprimanded on segments 3-15 (the default is C0 and should be 80 but the program corrects that itself

after the final 'y', the new CPM3.SYS is generated. copy this to user 0

PPIP cpm3.sys 0: /e



and you are done.






On Wednesday, June 24, 2015 at 12:36:13 PM UTC+2, computerdoc wrote:

Hi RHKoolaap,

Thank you so much for the instructions. The way you describe the procedure sounds simple. Will the new CPM3.sys file be put automatically in place of the original file and update the boot sector with the starting sector number or is there a whole procedure I need to know? As you can tell I have not done much with CPM or MPM for that matter. I just want to make sure I don’t make a mistake. Thanks a bunch!



Kip Koon

***@sc.rr.com <javascript:>

http://www.cocopedia.com/wiki/index.php/Kip_Koon





From: ***@googlegroups.com <javascript:> [mailto:***@googlegroups.com <javascript:> ] On Behalf Of RHKoolaap
Sent: Tuesday, June 23, 2015 4:44 PM
To: ***@googlegroups.com <javascript:>
Subject: Re: [N8VEM: 19716] Grant Searle's multicomputer revisited; the CP/M 3 update





Hi Kip

it is really easy to assign more memory to CP/M 3. GENCPM allows for max 15 extra memory segments to be included (bank '1' does not count). You just regenerate CPM3.sys specifying more pages of memory to be available. For 512 K that should be 15 pages (enter F for the question " Number of memory segments (#2) ? ". Put the new cpm3.sys in place of the old one and you're done. 5 minutes work, no coding is required.



MP/M is a different matter. I' haven't looked into that yet.



be well, RHK


On Tuesday, June 23, 2015 at 9:29:48 PM UTC+2, computerdoc wrote:

Hi RHKoolaap,

Thank you for all your hard work! I respect your desire for keeping to the 128KB Static Ram specification that Grant Searle used on his original design for the Multicomp. I certainly understand why you did that. I really do. I was wondering since James Moxham’s Multicomp PCB has the ability to have at least 512KB of Static Ram available to the system with a maximum of 1MB, I was wondering if you would be willing to update CP/M 3.0 and MP/M for that matter to have the ability to run as many multiple tasks that the ram can hold.

I have only one 512KB Static Ram chip on all my Multicomps simply because no one has implemented anything that used the rest as of yet anyway. Since the Multicomp PCB does exist and is available and has a minimum static ram memory size of 512KB with a maximum size of 1MB, I don’t see why we can’t use it all. You could have both versions available for people so they can go either way. I’d just like to see all of the ram utilized in some way. Just in case you have not heard of the Multicomp PCB, here’s a link to purchase one from James Moxham for only $16.

< http://www.smarthome.jigsy.com/fpga>

Ideas, thoughts, poseurs? Thank you for listening (reading). :) Take care my friend.



Kip Koon

***@sc.rr.com

http://www.cocopedia.com/wiki/index.php/Kip_Koon





From: ***@googlegroups.com [mailto:***@googlegroups.com] On Behalf Of RHKoolaap
Sent: Tuesday, June 23, 2015 12:04 PM
To: ***@googlegroups.com
Subject: [N8VEM: 19713] Grant Searle's multicomputer revisited; the CP/M 3 update



the previously described configuration can now boot CP/M 3.0 too.

Only 128 kilobyte SRAM is needed for it to work.

The bios supports 3 disks (A:, B: and C: which use the same layout as previously used (Grant's disk A:). Again all (max 240-ish) available volumes (slices, partitions ....) can be mounted to these drives with the included tool.

With ?xmove implemented, all buffers are located in bank 0 or bank 2, making 61k available as TPA.

There is no RAM drive as I wanted to stay within the 128 kB SRAM and besides, having 120-240 8 MB fast volumes available makes a 384 kB ramdrive a bit silly IMHO. My aim was maximizing the TPA size.

The BIOS is developed on the multicomp itself with the standard tools RMAC and LINK v1.31

All sources are included in the below package. You will find all you need to (re)build the the FGPA, ROM and OS'ses therein. (that is except for the Quartus II software. )



I just finished the package, and even though everything seems to work fine, I'm not guaranteeing anything.



Please find the package here:

http://www.filedropper.com/filemanager/public.php?service=files <http://www.filedropper.com/filemanager/public.php?service=files&t=614dcb7089fb14a4657ae493a707f9df> &t=614dcb7089fb14a4657ae493a707f9df



(it stays alive for a month. If you find it gone, please let me know and I'll upload it again)



have fun, RHK
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Kip Koon
2015-06-25 02:15:06 UTC
Permalink
Oops, wrong address.



From: Kip Koon [mailto:***@sc.rr.com]
Sent: Wednesday, June 24, 2015 8:58 PM
To: '***@googlegroups.com'
Subject: RE: [N8VEM: 19722] Grant Searle's multicomputer revisited; the CP/M 3 update



Hi RHKoolaap,

Fantastic! Thank you so much. I will try this out as soon I can afford to get some more SD Cards. I used the last one getting the 4 environment 6809 Multicomp running. :) That is to say CamelForth, Basic, Cubix and Flex all running from the same SD Card. I love it! Thanks again my friend.



Kip Koon

***@sc.rr.com

http://www.cocopedia.com/wiki/index.php/Kip_Koon





From: ***@googlegroups.com [mailto:***@googlegroups.com] On Behalf Of RHKoolaap
Sent: Wednesday, June 24, 2015 7:26 AM
To: ***@googlegroups.com
Subject: Re: [N8VEM: 19722] Grant Searle's multicomputer revisited; the CP/M 3 update



the way CP/M 3 loads is as follows:

the ROM loads the CPMLoader program from the system tracks, installs that in low memory. and starts execution of the loader.

This in turn loads the file CPM3.sys from disk and installs this in high memory. CPM3-sys is a bunch of code segments (4 in case of a banked system) which will be loaded either in common memory (above the banks) or in bank 0. then control is given to the BIOS BOOT segment which will load CCP.COM from disk to memory address 0100h in bank 1

The CPM3.SYS file contains the whole OS (except CCP.COM)



the GENCPM.COM program builds the CPM3.SYS file from the DR .SPR files and the BNKBIOS3.SPR that you create from the .REL files from the custom BIOS build.

only then will be determined where the codesegments are loaded, where the buffers go and how the paging is organized. This data is stored in the CPM3.SYS file.



Back to your question. If you run GENCPM from user0 the new CPM3.SYS will replace the old one and that is all you need. the system is not stored on the system tracks, that is where the loader program resides, which does not change.



if you installed the 4disk image this is the complete instruction:

<reset>

S3 (start CPM/3)

set rmac.com [sys

set link.com [sys

set gencpm [sys

set ppip.com [sys ( this makes these programs available from all user areas)

3: (switch to user area 3)

RMAC bioskrnl (makes BIOSKRNL.REL)

RMAC boot (makes BOOT.REL)

RMAC chario (makes CHARIO.REL)

RMAC drvtbl( makes DRVTBL.REL)

RMAC move

RMAC scb

RMAC disk (you just assembled the user bios part)

LINK BNKBIOS3[B]=BIOSKRNL,SCB,BOOT,CHARIO,MOVE,DRVTBL,DISK

GENCPM

answer all the questions. You can accept all the defaults until:

Number of memory segments (#2) ? say F (gencpm defaults to hexadecimal input)

then accept all the remaining defaults. you will be reprimanded on segments 3-15 (the default is C0 and should be 80 but the program corrects that itself

after the final 'y', the new CPM3.SYS is generated. copy this to user 0

PPIP cpm3.sys 0: /e



and you are done.






On Wednesday, June 24, 2015 at 12:36:13 PM UTC+2, computerdoc wrote:

Hi RHKoolaap,

Thank you so much for the instructions. The way you describe the procedure sounds simple. Will the new CPM3.sys file be put automatically in place of the original file and update the boot sector with the starting sector number or is there a whole procedure I need to know? As you can tell I have not done much with CPM or MPM for that matter. I just want to make sure I don’t make a mistake. Thanks a bunch!



Kip Koon

***@sc.rr.com <javascript:>

http://www.cocopedia.com/wiki/index.php/Kip_Koon





From: ***@googlegroups.com <javascript:> [mailto:***@googlegroups.com <javascript:> ] On Behalf Of RHKoolaap
Sent: Tuesday, June 23, 2015 4:44 PM
To: ***@googlegroups.com <javascript:>
Subject: Re: [N8VEM: 19716] Grant Searle's multicomputer revisited; the CP/M 3 update





Hi Kip

it is really easy to assign more memory to CP/M 3. GENCPM allows for max 15 extra memory segments to be included (bank '1' does not count). You just regenerate CPM3.sys specifying more pages of memory to be available. For 512 K that should be 15 pages (enter F for the question " Number of memory segments (#2) ? ". Put the new cpm3.sys in place of the old one and you're done. 5 minutes work, no coding is required.



MP/M is a different matter. I' haven't looked into that yet.



be well, RHK


On Tuesday, June 23, 2015 at 9:29:48 PM UTC+2, computerdoc wrote:

Hi RHKoolaap,

Thank you for all your hard work! I respect your desire for keeping to the 128KB Static Ram specification that Grant Searle used on his original design for the Multicomp. I certainly understand why you did that. I really do. I was wondering since James Moxham’s Multicomp PCB has the ability to have at least 512KB of Static Ram available to the system with a maximum of 1MB, I was wondering if you would be willing to update CP/M 3.0 and MP/M for that matter to have the ability to run as many multiple tasks that the ram can hold.

I have only one 512KB Static Ram chip on all my Multicomps simply because no one has implemented anything that used the rest as of yet anyway. Since the Multicomp PCB does exist and is available and has a minimum static ram memory size of 512KB with a maximum size of 1MB, I don’t see why we can’t use it all. You could have both versions available for people so they can go either way. I’d just like to see all of the ram utilized in some way. Just in case you have not heard of the Multicomp PCB, here’s a link to purchase one from James Moxham for only $16.

< http://www.smarthome.jigsy.com/fpga>

Ideas, thoughts, poseurs? Thank you for listening (reading). :) Take care my friend.



Kip Koon

***@sc.rr.com

http://www.cocopedia.com/wiki/index.php/Kip_Koon





From: ***@googlegroups.com [mailto:***@googlegroups.com] On Behalf Of RHKoolaap
Sent: Tuesday, June 23, 2015 12:04 PM
To: ***@googlegroups.com
Subject: [N8VEM: 19713] Grant Searle's multicomputer revisited; the CP/M 3 update



the previously described configuration can now boot CP/M 3.0 too.

Only 128 kilobyte SRAM is needed for it to work.

The bios supports 3 disks (A:, B: and C: which use the same layout as previously used (Grant's disk A:). Again all (max 240-ish) available volumes (slices, partitions ....) can be mounted to these drives with the included tool.

With ?xmove implemented, all buffers are located in bank 0 or bank 2, making 61k available as TPA.

There is no RAM drive as I wanted to stay within the 128 kB SRAM and besides, having 120-240 8 MB fast volumes available makes a 384 kB ramdrive a bit silly IMHO. My aim was maximizing the TPA size.

The BIOS is developed on the multicomp itself with the standard tools RMAC and LINK v1.31

All sources are included in the below package. You will find all you need to (re)build the the FGPA, ROM and OS'ses therein. (that is except for the Quartus II software. )



I just finished the package, and even though everything seems to work fine, I'm not guaranteeing anything.



Please find the package here:

http://www.filedropper.com/filemanager/public.php?service=files <http://www.filedropper.com/filemanager/public.php?service=files&t=614dcb7089fb14a4657ae493a707f9df> &t=614dcb7089fb14a4657ae493a707f9df



(it stays alive for a month. If you find it gone, please let me know and I'll upload it again)



have fun, RHK
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RHKoolaap
2015-06-24 11:42:27 UTC
Permalink
Enter code here...

the way CP/M 3 loads is as follows:
the ROM loads the CPMLoader program from the system tracks, installs that
in low memory. and starts execution of the loader.
This in turn loads the file CPM3.sys from disk and installs this in high
memory. CPM3-sys is a bunch of code segments (4 in case of a banked system)
which will be loaded either in common memory (above the banks) or in bank
0. then control is given to the BIOS BOOT segment which will load CCP.COM
<http://ccp.com/> from disk to memory address 0100h in bank 1
The CPM3.SYS file contains the whole OS (except CCP.COM <http://ccp.com/>)

the GENCPM.COM <http://gencpm.com/> program builds the CPM3.SYS file from
the DR .SPR files and the BNKBIOS3.SPR that you create from the .REL files
from the custom BIOS build.
only then will be determined where the codesegments are loaded, where the
buffers go and how the paging is organized. This data is stored in the
CPM3.SYS file.

Back to your question. If you run GENCPM from user0 the new CPM3.SYS will
replace the old one and that is all you need. the system is not stored on
the system tracks, that is where the loader program resides, which does not
change.

if you installed the 4disk image this is the complete instruction:

*<reset>*
*S3* (start CPM/3)
( I think I have already done this, type *DIRS*, and when the following
programs show you can skip setting them)
(if not...)
*set rmac.com <http://rmac.com/> [sys*
*set link.com <http://link.com/> [sys*
*set gencpm [sys *
*set ppip.com <http://ppip.com/> [sys* ( this makes these programs
available from all user areas)

*3: * (switch to user area 3; this is where the sources are)
*RMAC bioskrnl* (makes BIOSKRNL.REL)
*RMAC boot* (makes BOOT.REL)
*RMAC chario* (makes CHARIO.REL)
*RMAC drvtbl *(makes DRVTBL.REL)
*RMAC move* (makes MOVE.REL)
*RMAC scb* (makes SCB.REL)
*RMAC disk * (maked DISK.REL)

(you just assembled the user bios part)


*LINK BNKBIOS3[B]=BIOSKRNL,SCB,BOOT,CHARIO,MOVE,DRVTBL,DISK* (makes
BNKBIOS3.SPR)
*GENCPM*

answer all the questions. You can accept all the defaults until:

*Number of memory segments (#2) ?* say* F* (gencpm defaults to hexadecimal
input)

then accept all the remaining defaults. you will be reprimanded on segments
3-15 (the default is C0 and should be 80 but the program corrects that
itself

after the final 'y', the new CPM3.SYS is generated.



copy this to user 0

*PPIP cpm3.sys 0: /e*

and you are done.

if you mess up gencpm, just hit CTRL-C and start anew.

success. RHK
Post by Kip Koon
Hi RHKoolaap,
Thank you so much for the instructions. The way you describe the
procedure sounds simple. Will the new CPM3.sys file be put automatically
in place of the original file and update the boot sector with the starting
sector number or is there a whole procedure I need to know? As you can
tell I have not done much with CPM or MPM for that matter. I just want to
make sure I don’t make a mistake. Thanks a bunch!
Kip Koon
http://www.cocopedia.com/wiki/index.php/Kip_Koon
*Sent:* Tuesday, June 23, 2015 4:44 PM
*Subject:* Re: [N8VEM: 19716] Grant Searle's multicomputer revisited; the
CP/M 3 update
Hi Kip
it is really easy to assign more memory to CP/M 3. GENCPM allows for max
15 extra memory segments to be included (bank '1' does not count). You
just regenerate CPM3.sys specifying more pages of memory to be available.
For 512 K that should be 15 pages (enter F for the question " Number of
memory segments (#2) ? ". Put the new cpm3.sys in place of the old one and
you're done. 5 minutes work, no coding is required.
MP/M is a different matter. I' haven't looked into that yet.
be well, RHK
Hi RHKoolaap,
Thank you for all your hard work! I respect your desire for keeping to
the 128KB Static Ram specification that Grant Searle used on his original
design for the Multicomp. I certainly understand why you did that. I
really do. I was wondering since James Moxham’s Multicomp PCB has the
ability to have at least 512KB of Static Ram available to the system with a
maximum of 1MB, I was wondering if you would be willing to update CP/M 3.0
and MP/M for that matter to have the ability to run as many multiple tasks
that the ram can hold.
I have only one 512KB Static Ram chip on all my Multicomps simply because
no one has implemented anything that used the rest as of yet anyway. Since
the Multicomp PCB does exist and is available and has a minimum static ram
memory size of 512KB with a maximum size of 1MB, I don’t see why we can’t
use it all. You could have both versions available for people so they can
go either way. I’d just like to see all of the ram utilized in some way.
Just in case you have not heard of the Multicomp PCB, here’s a link to
purchase one from James Moxham for only $16.
< http://www.smarthome.jigsy.com/fpga>
Ideas, thoughts, poseurs? Thank you for listening (reading). :) Take care my friend.
Kip Koon
http://www.cocopedia.com/wiki/index.php/Kip_Koon
Of *RHKoolaap
*Sent:* Tuesday, June 23, 2015 12:04 PM
*Subject:* [N8VEM: 19713] Grant Searle's multicomputer revisited; the
CP/M 3 update
the previously described configuration can now boot CP/M 3.0 too.
Only 128 kilobyte SRAM is needed for it to work.
The bios supports 3 disks (A:, B: and C: which use the same layout as
previously used (Grant's disk A:). Again all (max 240-ish) available
volumes (slices, partitions ....) can be mounted to these drives with the
included tool.
With ?xmove implemented, all buffers are located in bank 0 or bank 2,
making 61k available as TPA.
There is no RAM drive as I wanted to stay within the 128 kB SRAM and
besides, having 120-240 8 MB fast volumes available makes a 384 kB ramdrive
a bit silly IMHO. My aim was maximizing the TPA size.
The BIOS is developed on the multicomp itself with the standard tools RMAC and LINK v1.31
All sources are included in the below package. You will find all you need
to (re)build the the FGPA, ROM and OS'ses therein. (that is except for the
Quartus II software. )
I just finished the package, and even though everything seems to work
fine, I'm not guaranteeing anything.
http://www.filedropper.com/filemanager/public.php?service=files&t=614dcb7089fb14a4657ae493a707f9df
(it stays alive for a month. If you find it gone, please let me know and
I'll upload it again)
have fun, RHK
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James Moxham
2015-06-23 23:50:06 UTC
Permalink
I'm following all this with great interest!

Just a quick note - Max Scane and I have been working on new boards. We
ran out of internal space in the cyclone II board when we wanted to add
banked memory and other things. At the same time, Cyclone IV boards are
coming down in price and are nearly as cheap now as the Cyclone II board
Grant uses. Cyclone IV uses the latest version of Quartus. Other main
differences are there are more pins and more internal ram and more
internal LEs. So can have serial ports with bidirectional flow control (4
pins) and an extra serial port for wifi. Max got MP/M working the other
day, and wifi is at the early stage of working. Other crazy ideas in the
pipeline such as dual VGA/dual keyboard to show MP/M in its true colors :)
Board design is still not finalized. One idea we are exploring is
something more modular, so it can handle a variety of fpga boards, and
with some pins brought out to headers so it is more flexible - eg adding
multiple serial ports, or dual SD cards.
Max has also got things working with the new jtag system. Many of the new
boards only have one 10 pin programming header and it is labelled jtag and
jtag is the temporary download (AS is for permanent). What has happened is
with the newer versions of Quartus, they download a temporary program via
jtag, and then a second program to make it permanent. It is all seamless
to the user and a one click process. There are a number of Cyclone IV
boards around the $30 mark that would be suitable.

Cheers, James Moxham
Post by Kip Koon
Hi RHKoolaap,
Thank you for all your hard work! I respect your desire for keeping to
the 128KB Static Ram specification that Grant Searle used on >his
original design for the Multicomp. I certainly understand why you did
that. I really do. I was wondering since James >Moxham’s Multicomp PCB
has the ability to have at least 512KB of Static Ram available to the
system with a maximum of 1MB, I >was wondering if you would be willing
to update CP/M 3.0 and MP/M for that matter to have the ability to run
as many multiple >tasks that the ram can hold.
I have only one 512KB Static Ram chip on all my Multicomps simply
because no one has implemented anything that used the rest >as of yet
anyway. Since the Multicomp PCB does exist and is available and has a
minimum static ram memory size of 512KB with a >maximum size of 1MB, I
don’t see why we can’t use it all. You could have both versions
available for people so they can go either >way. I’d just like to see
all of the ram utilized in some way. Just in case you have not heard of
the Multicomp PCB, here’s a link to >purchase one from James Moxham for
only $16.
< http://www.smarthome.jigsy.com/fpga>
Ideas, thoughts, poseurs? Thank you for listening (reading). :) Take care my friend.
Kip Koon
http://www.cocopedia.com/wiki/index.php/Kip_Koon
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RHKoolaap
2015-06-24 12:18:22 UTC
Permalink
Hi James,
First let me thank you for your efforts you so graciously shared with us. I
shamelessly incorporated your MMU.VHD in my project.

I really like the constraints of the smaller board, and I'm sure there is a
lot more for me to do here. I'm only starting to get my head wrapped around
VHDL and there are still plenty of pins for me to use. I think I'll stay
with the Cyclone II for now

On the other hand I can sympathize with you (and Max's) efforts to use more
capable hardware. By the way, checking the pin-outs, the Cyclone IV chip
still has all the required configuration pins, so it should be possible to
wire up an AS interface, even if the dev-board does not provide it. Or am I
missing something?
I might not want to use the Cyclone IV for now, but you can rest assured I
will follow whatever comes out of it. You never know what will be useful...

While I agree with you that the price for a Cyclone IV board is quite
reasonable It is above the 'free to import' limit over here. meaning I have
to pay the carrier a 10 euro "processing fee" and the state the 21% VAT, so
the price is more like $50, plus a lot of extra hassle,

Thanks again for your work, and if my tinkering is of some use to you, so
much the better.

regards, RHK

On Wednesday, June 24, 2015 at 1:50:23 AM UTC+2, James Moxham (Dr_Acula)
Post by James Moxham
I'm following all this with great interest!
Just a quick note - Max Scane and I have been working on new boards. We
ran out of internal space in the cyclone II board when we wanted to add
banked memory and other things. At the same time, Cyclone IV boards are
coming down in price and are nearly as cheap now as the Cyclone II board
Grant uses. Cyclone IV uses the latest version of Quartus. Other main
differences are there are more pins and more internal ram and more internal
LEs. So can have serial ports with bidirectional flow control (4 pins) and
an extra serial port for wifi. Max got MP/M working the other day, and wifi
is at the early stage of working. Other crazy ideas in the pipeline such as
dual VGA/dual keyboard to show MP/M in its true colors :)
Board design is still not finalized. One idea we are exploring is
something more modular, so it can handle a variety of fpga boards, and with
some pins brought out to headers so it is more flexible - eg adding
multiple serial ports, or dual SD cards.
Max has also got things working with the new jtag system. Many of the new
boards only have one 10 pin programming header and it is labelled jtag and
jtag is the temporary download (AS is for permanent). What has happened is
with the newer versions of Quartus, they download a temporary program via
jtag, and then a second program to make it permanent. It is all seamless to
the user and a one click process. There are a number of Cyclone IV boards
around the $30 mark that would be suitable.
Cheers, James Moxham
Hi RHKoolaap,
Thank you for all your hard work! I respect your desire for keeping to
the 128KB Static Ram specification that Grant Searle used on his original
design for the Multicomp. I certainly understand why you did that. I
really do. I was wondering since James Moxham’s Multicomp PCB has the
ability to have at least 512KB of Static Ram available to the system with a
maximum of 1MB, I was wondering if you would be willing to update CP/M 3.0
and MP/M for that matter to have the ability to run as many multiple tasks
that the ram can hold.
I have only one 512KB Static Ram chip on all my Multicomps simply because
no one has implemented anything that used the rest as of yet anyway. Since
the Multicomp PCB does exist and is available and has a minimum static ram
memory size of 512KB with a maximum size of 1MB, I don’t see why we can’t
use it all. You could have both versions available for people so they can
go either way. I’d just like to see all of the ram utilized in some way.
Just in case you have not heard of the Multicomp PCB, here’s a link to
purchase one from James Moxham for only $16.
< http://www.smarthome.jigsy.com/fpga>
Ideas, thoughts, poseurs? Thank you for listening (reading). :) Take care my friend.
Kip Koon
http://www.cocopedia.com/wiki/index.php/Kip_Koon
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James Moxham
2015-06-24 13:09:57 UTC
Permalink
Ah, the import fees are an issue, I agree.

Re the AS pins, it is not a problem, the jtag port becomes a virtual AS
port as well. So any fpga board we see with just one 10 pin box header on
it will be fine.

I have been researching what is available on ebay at a reasonable price
and what you get. Cyclone II and Cyclone IV seem to hit the sweet spot.
Costs in Australian dollars, YMMV. Then went to the altera comparison page
https://cloud.altera.com/ds/part/?family=cyclone-iv&device=All

Grant's board, EP2C5T144, 89 pins, $24, 4608 LEs, 119808 bits ram
Cyclone IV EP4CE6E22C8N, 92 pins, $40, 6272 LEs, 276480 bits ram
Cyclone IV EP4CE10F17C8N, 180 pins, $50, 10,320 LEs, 423536 bits ram

Grant's board certainly hits a sweet spot with price.

The board Max and I have built just now is the middle one, an EP4CE6.
About 50% more LEs and more than twice the internal ram. However, only 3
more pins.

Grant's board has at least 8 unused pins, and in theory you could use
these for things like more serial ports. However, then you run out of LEs.
Ditto if you start adding things like banked memory - it gets very tight
and it might be possible to do MP/M or a ram disk, but maybe not both.

The EP4CE6 is $40. Then if you pay another $10 the EP4CE10 gets a whole
lot more. 4x the ram which means there would be video modes with 3 bits
per color, which is 512 colors vs the current 32 colors. Double the number
of pins. Enough LEs that you would be able to add, say, 8 serial uarts
like Max would like to. Or dual VGA displays with decent color resolution
like I want to. Plus dual SDs without worrying about running out of LEs or
pins or both.

Everything seems to be a compromise, and there are good features of all
the boards.

What I am thinking (as someone who has designed several boards now) is
that a modular approach may be more flexible. Take the waveshare system
which seems to have a standard of three types of breakout - 8 bits, 16
bits and 32 bits. That is pretty simple.

Take Grant's board and create some addon boards that plug into the
waveshare system (see attached) so it works with all the cyclone IV boards.

Maybe then go back and create a board for the Grants Cyclone II that
brings out pins in groups of 8, 16 and 32 so that the same add-on boards
can be used there.

The little add-on boards I have designed are really cheap - 5x5cm and
maybe $2 each.

I'd really appreciate some input on all this. I guess what I am trying to
do is come up with a flexible set of boards that can be useful for those
on a budget, but also can be expanded as needed into bigger and better
systems.

Cheers, James Moxham
Post by RHKoolaap
Hi James,
First let me thank you for your efforts you so graciously shared with
us. I shamelessly incorporated your MMU.VHD in my project.
I really like the constraints of the smaller board, and I'm sure there
is a lot more for me to do here. I'm only starting to get my head
wrapped around >VHDL and there are still plenty of pins for me to use. I
think I'll stay with the Cyclone II for now
On the other hand I can sympathize with you (and Max's) efforts to use
more capable hardware. By the way, checking the pin-outs, the Cyclone IV
chip still has all the required configuration pins, so it should be
possible to wire up an AS interface, even if the dev-board does not
provide it. Or am I >missing something?
I might not want to use the Cyclone IV for now, but you can rest assured
I will follow whatever comes out of it. You never know what will be
useful...
While I agree with you that the price for a Cyclone IV board is quite
reasonable It is above the 'free to import' limit over here. meaning I
have to pay >the carrier a 10 euro "processing fee" and the state the
21% VAT, so the price is more like $50, plus a lot of extra hassle,
Thanks again for your work, and if my tinkering is of some use to you,
so much the better.
regards, RHK
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RHKoolaap
2015-06-24 17:02:51 UTC
Permalink
Hi James,

As you might have guessed I would not likely be using this system. I like
to do things my own way. It seems like you are proposing something like
'shields' or 'capes' or 'hats' , which are like LEGOs that fit only one
way. Not really what I'm looking for at the moment.

Oh and the lowest price on ebay for Grant's board I found is $16.23 US
(about $20 AU?) including shipping

I don't know that building what you guess other people would want is the
way to go. Just build what you want and if others want it too that is okay.
It is, after all, a HOBBY.

regards, RHK


On Wednesday, June 24, 2015 at 3:10:31 PM UTC+2, James Moxham (Dr_Acula)
Post by James Moxham
Ah, the import fees are an issue, I agree.
Re the AS pins, it is not a problem, the jtag port becomes a virtual AS
port as well. So any fpga board we see with just one 10 pin box header on
it will be fine.
I have been researching what is available on ebay at a reasonable price
and what you get. Cyclone II and Cyclone IV seem to hit the sweet spot.
Costs in Australian dollars, YMMV. Then went to the altera comparison page
https://cloud.altera.com/ds/part/?family=cyclone-iv&device=All
Grant's board, EP2C5T144, 89 pins, $24, 4608 LEs, 119808 bits ram
Cyclone IV EP4CE6E22C8N, 92 pins, $40, 6272 LEs, 276480 bits ram
Cyclone IV EP4CE10F17C8N, 180 pins, $50, 10,320 LEs, 423536 bits ram
Grant's board certainly hits a sweet spot with price.
The board Max and I have built just now is the middle one, an EP4CE6.
About 50% more LEs and more than twice the internal ram. However, only 3
more pins.
Grant's board has at least 8 unused pins, and in theory you could use
these for things like more serial ports. However, then you run out of LEs.
Ditto if you start adding things like banked memory - it gets very tight
and it might be possible to do MP/M or a ram disk, but maybe not both.
The EP4CE6 is $40. Then if you pay another $10 the EP4CE10 gets a whole
lot more. 4x the ram which means there would be video modes with 3 bits per
color, which is 512 colors vs the current 32 colors. Double the number of
pins. Enough LEs that you would be able to add, say, 8 serial uarts like
Max would like to. Or dual VGA displays with decent color resolution like I
want to. Plus dual SDs without worrying about running out of LEs or pins or
both.
Everything seems to be a compromise, and there are good features of all
the boards.
What I am thinking (as someone who has designed several boards now) is
that a modular approach may be more flexible. Take the waveshare system
which seems to have a standard of three types of breakout - 8 bits, 16 bits
and 32 bits. That is pretty simple.
Take Grant's board and create some addon boards that plug into the
waveshare system (see attached) so it works with all the cyclone IV boards.
Maybe then go back and create a board for the Grants Cyclone II that
brings out pins in groups of 8, 16 and 32 so that the same add-on boards
can be used there.
The little add-on boards I have designed are really cheap - 5x5cm and
maybe $2 each.
I'd really appreciate some input on all this. I guess what I am trying to
do is come up with a flexible set of boards that can be useful for those on
a budget, but also can be expanded as needed into bigger and better systems.
Cheers, James Moxham
Hi James,
First let me thank you for your efforts you so graciously shared with us.
I shamelessly incorporated your MMU.VHD in my project.
I really like the constraints of the smaller board, and I'm sure there is
a lot more for me to do here. I'm only starting to get my head wrapped
around VHDL and there are still plenty of pins for me to use. I think I'll
stay with the Cyclone II for now
On the other hand I can sympathize with you (and Max's) efforts to use
more capable hardware. By the way, checking the pin-outs, the Cyclone IV
chip still has all the required configuration pins, so it should be
possible to wire up an AS interface, even if the dev-board does not provide
it. Or am I missing something?
I might not want to use the Cyclone IV for now, but you can rest assured I
will follow whatever comes out of it. You never know what will be useful...
While I agree with you that the price for a Cyclone IV board is quite
reasonable It is above the 'free to import' limit over here. meaning I have
to pay the carrier a 10 euro "processing fee" and the state the 21% VAT, so
the price is more like $50, plus a lot of extra hassle,
Thanks again for your work, and if my tinkering is of some use to you, so
much the better.
regards, RHK
--
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Kip Koon
2015-06-25 02:07:17 UTC
Permalink
Hi James and Max,

I like where you both are going with the new Multicomp design. The modular design is interesting and useful for experimentation. The single PCB with everything included is also nice and doesn’t need assembling every time one wants to use the new Multicomp System. Both solutions have their advantages though.

I, myself, would like the one board solution so all I need to do is pull the completed PCB from its antistatic bag, plug up all the cables, plug up power and start using it. I can see the usefulness for both versions, but the single PCB is my preferred choice.

Which will cost less? That is another issue. I reckon the least expensive solution will be the one I pick – at least in the beginning anyway. Later on, I can see possibly getting both versions online. I will of course go with whatever you guys decide on.

One idea I am currently working with is creating a Front Panel of lights that will not only show the status of all the external pins of the FPGA module that’s plugged into the Multicomp, but also all the internal registers as well. You see with VHDL coding for the microprocessor core implemented inside the FPGA chip, we have for the first time the potential ability to have blinking lights for everything inside the 6809 and later for the 6309 too once someone creates the VHDL cpu core for it. I have an initial design for a Multiplexed Register Bus that only needs 12 pins to implement the connection between the Multicomp and the Front Panel. This is of course an output only display at this point. Any switches that are needed can be implemented with a new input register for every 8 switches required. I thought of having a full complement of switches similar to a 6809 computer I saw on the internet breadboarded with a “Front panel” like setup which made it possible to enter binary code directly into the ram like the original Altair did. That way, we can actually see everything going on inside the processor and everything else as well if we like. This would be a fantastic educational add-on to the Multicomp Design for those that want to really learn everything the 6809 cpu has to offer and it would be a great debugging tool as well.

When I first came up with this idea, it dawned on me that that is why the very first mainframe computers had so many lights on them. They were actually able to see all the registers’ contents in the computer with them. Besides, it would look so cool as well. Ideas, comments, posers? All positive views are most welcome. Well, this is my 2 cents worth, maybe 3. :) Take care my friends.



Kip Koon

***@sc.rr.com

http://www.cocopedia.com/wiki/index.php/Kip_Koon





From: ***@googlegroups.com [mailto:***@googlegroups.com] On Behalf Of James Moxham
Sent: Wednesday, June 24, 2015 9:10 AM
To: ***@googlegroups.com
Subject: Re: [N8VEM: 19724] Grant Searle's multicomputer revisited; the CP/M 3 update



Ah, the import fees are an issue, I agree.



Re the AS pins, it is not a problem, the jtag port becomes a virtual AS port as well. So any fpga board we see with just one 10 pin box header on it will be fine.



I have been researching what is available on ebay at a reasonable price and what you get. Cyclone II and Cyclone IV seem to hit the sweet spot. Costs in Australian dollars, YMMV. Then went to the altera comparison page https://cloud.altera.com/ds/part/?family=cyclone-iv <https://cloud.altera.com/ds/part/?family=cyclone-iv&device=All> &device=All



Grant's board, EP2C5T144, 89 pins, $24, 4608 LEs, 119808 bits ram

Cyclone IV EP4CE6E22C8N, 92 pins, $40, 6272 LEs, 276480 bits ram

Cyclone IV EP4CE10F17C8N, 180 pins, $50, 10,320 LEs, 423536 bits ram



Grant's board certainly hits a sweet spot with price.



The board Max and I have built just now is the middle one, an EP4CE6. About 50% more LEs and more than twice the internal ram. However, only 3 more pins.



Grant's board has at least 8 unused pins, and in theory you could use these for things like more serial ports. However, then you run out of LEs. Ditto if you start adding things like banked memory - it gets very tight and it might be possible to do MP/M or a ram disk, but maybe not both.



The EP4CE6 is $40. Then if you pay another $10 the EP4CE10 gets a whole lot more. 4x the ram which means there would be video modes with 3 bits per color, which is 512 colors vs the current 32 colors. Double the number of pins. Enough LEs that you would be able to add, say, 8 serial uarts like Max would like to. Or dual VGA displays with decent color resolution like I want to. Plus dual SDs without worrying about running out of LEs or pins or both.



Everything seems to be a compromise, and there are good features of all the boards.



What I am thinking (as someone who has designed several boards now) is that a modular approach may be more flexible. Take the waveshare system which seems to have a standard of three types of breakout - 8 bits, 16 bits and 32 bits. That is pretty simple.



Take Grant's board and create some addon boards that plug into the waveshare system (see attached) so it works with all the cyclone IV boards.



Maybe then go back and create a board for the Grants Cyclone II that brings out pins in groups of 8, 16 and 32 so that the same add-on boards can be used there.



The little add-on boards I have designed are really cheap - 5x5cm and maybe $2 each.



I'd really appreciate some input on all this. I guess what I am trying to do is come up with a flexible set of boards that can be useful for those on a budget, but also can be expanded as needed into bigger and better systems.



Cheers, James Moxham







On Wed, 24 Jun 2015 21:48:22 +0930, RHKoolaap <***@gmail.com> wrote:



Hi James,

First let me thank you for your efforts you so graciously shared with us. I shamelessly incorporated your MMU.VHD in my project.



I really like the constraints of the smaller board, and I'm sure there is a lot more for me to do here. I'm only starting to get my head wrapped around VHDL and there are still plenty of pins for me to use. I think I'll stay with the Cyclone II for now



On the other hand I can sympathize with you (and Max's) efforts to use more capable hardware. By the way, checking the pin-outs, the Cyclone IV chip still has all the required configuration pins, so it should be possible to wire up an AS interface, even if the dev-board does not provide it. Or am I missing something?

I might not want to use the Cyclone IV for now, but you can rest assured I will follow whatever comes out of it. You never know what will be useful...



While I agree with you that the price for a Cyclone IV board is quite reasonable It is above the 'free to import' limit over here. meaning I have to pay the carrier a 10 euro "processing fee" and the state the 21% VAT, so the price is more like $50, plus a lot of extra hassle,



Thanks again for your work, and if my tinkering is of some use to you, so much the better.



regards, RHK
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James Moxham
2015-06-25 02:24:45 UTC
Permalink
Hi all,

Fair comments there with two people in a row voting for single board
rather than lots of add-on boards. We will go with that one now, and maybe
later look at the more expensive chip with 180 i/o pins. Max and I are
working on a design for an EP4CE6. Single board, 1meg of ram, vga,
keyboard, wifi, sd and either 3 or 4 RS232 ports. 10x10cm board.

Has 8 leds on the fpga board so can program the vhdl to do blinkenlights.

Just finalising a few things and then will post the design.

Cheers, James
Post by Kip Koon
Hi James and Max,
I like where you both are going with the new Multicomp design. The
modular design is interesting and useful for >experimentation. The
single PCB with everything included is also nice and doesn’t need
assembling every time one wants to use >the new Multicomp System. Both
solutions have their advantages though.
I, myself, would like the one board solution so all I need to do is pull
the completed PCB from its antistatic bag, plug up all the >cables, plug
up power and start using it. I can see the usefulness for both
versions, but the single PCB is my preferred choice.
Which will cost less? That is another issue. I reckon the least
expensive solution will be the one I pick – at least in the beginning
Post by Kip Koon
anyway. Later on, I can see possibly getting both versions online. I
will of course go with whatever you guys decide on.
One idea I am currently working with is creating a Front Panel of lights
that will not only show the status of all the external pins of >the FPGA
module that’s plugged into the Multicomp, but also all the internal
registers as well. You see with VHDL coding for the >microprocessor
core implemented inside the FPGA chip, we have for the first time the
potential ability to have blinking lights for >everything inside the
6809 and later for the 6309 too once someone creates the VHDL cpu core
for it. I have an initial design for a >Multiplexed Register Bus that
only needs 12 pins to implement the connection between the Multicomp and
the Front Panel. This >is of course an output only display at this
point. Any switches that are needed can be implemented with a new input
register for >every 8 switches required. I thought of having a full
complement of switches similar to a 6809 computer I saw on the internet
Post by Kip Koon
breadboarded with a “Front panel” like setup which made it possible to
enter binary code directly into the ram like the original >Altair did.
That way, we can actually see everything going on inside the processor
and everything else as well if we like. This >would be a fantastic
educational add-on to the Multicomp Design for those that want to really
learn everything the 6809 cpu has >to offer and it would be a great
debugging tool as well.
When I first came up with this idea, it dawned on me that that is why
the very first mainframe computers had so many lights on >them. They
were actually able to see all the registers’ contents in the computer
with them. Besides, it would look so cool as >well. Ideas, comments,
posers? All positive views are most welcome. Well, this is my 2 cents
worth, maybe 3. :) Take care my >friends.
Kip Koon
http://www.cocopedia.com/wiki/index.php/Kip_Koon
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Kip Koon
2015-06-25 04:01:53 UTC
Permalink
Hi Guys,

I can hardly wait to test this new Multicomp design out!. Please consider me as one of your test subjects. :) Funny how that sounds now that I’ve typed that last statement out. The Multicomp upgrades can’t come quick enough though, but I do prefer accuracy over how quick you guys can get the boards done so do take enough time to get it all correct. :) Thanks a bunch for your efforts.

Oh, by the way, does your CP/M and MP/M configurations take advantage of all the ram on the current Multicomp v1.09 PCB that you sell or just part of the first 512KB static memory chip. If only part, are they easily modified to use the full 512KB chip now and be upgradable again when I am able to get the other ram chip to upgrade the hardware to the full 1MB static ram? I have been shown a procedure for CP/M 3 to upgrade CPM3.sys to be able to use $F banks with RMAC, LINK, GENCPM, but I don’t know if CP/M 2 or MP/M II v2.1 can be similarly upgraded. Your thoughts are most appreciated. Thanks again. Now I can go play with my Multicomps after the thunderstorm passes. :) Take care my friends.



Kip Koon

***@sc.rr.com

http://www.cocopedia.com/wiki/index.php/Kip_Koon





From: ***@googlegroups.com [mailto:***@googlegroups.com] On Behalf Of James Moxham
Sent: Wednesday, June 24, 2015 10:25 PM
To: ***@googlegroups.com
Subject: Re: [N8VEM: 19730] Grant Searle's multicomputer revisited; the CP/M 3 update



Hi all,



Fair comments there with two people in a row voting for single board rather than lots of add-on boards. We will go with that one now, and maybe later look at the more expensive chip with 180 i/o pins. Max and I are working on a design for an EP4CE6. Single board, 1meg of ram, vga, keyboard, wifi, sd and either 3 or 4 RS232 ports. 10x10cm board.



Has 8 leds on the fpga board so can program the vhdl to do blinkenlights.



Just finalising a few things and then will post the design.



Cheers, James





On Thu, 25 Jun 2015 11:37:17 +0930, Kip Koon <***@sc.rr.com> wrote:



Hi James and Max,

I like where you both are going with the new Multicomp design. The modular design is interesting and useful for experimentation. The single PCB with everything included is also nice and doesn’t need assembling every time one wants to use the new Multicomp System. Both solutions have their advantages though.

I, myself, would like the one board solution so all I need to do is pull the completed PCB from its antistatic bag, plug up all the cables, plug up power and start using it. I can see the usefulness for both versions, but the single PCB is my preferred choice.

Which will cost less? That is another issue. I reckon the least expensive solution will be the one I pick – at least in the beginning anyway. Later on, I can see possibly getting both versions online. I will of course go with whatever you guys decide on.

One idea I am currently working with is creating a Front Panel of lights that will not only show the status of all the external pins of the FPGA module that’s plugged into the Multicomp, but also all the internal registers as well. You see with VHDL coding for the microprocessor core implemented inside the FPGA chip, we have for the first time the potential ability to have blinking lights for everything inside the 6809 and later for the 6309 too once someone creates the VHDL cpu core for it. I have an initial design for a Multiplexed Register Bus that only needs 12 pins to implement the connection between the Multicomp and the Front Panel. This is of course an output only display at this point. Any switches that are needed can be implemented with a new input register for every 8 switches required. I thought of having a full complement of switches similar to a 6809 computer I saw on the internet breadboarded with a “Front panel” like setup which made it possible to enter binary code directly into the ram like the original Altair did. That way, we can actually see everything going on inside the processor and everything else as well if we like. This would be a fantastic educational add-on to the Multicomp Design for those that want to really learn everything the 6809 cpu has to offer and it would be a great debugging tool as well.

When I first came up with this idea, it dawned on me that that is why the very first mainframe computers had so many lights on them. They were actually able to see all the registers’ contents in the computer with them. Besides, it would look so cool as well. Ideas, comments, posers? All positive views are most welcome. Well, this is my 2 cents worth, maybe 3. :) Take care my friends.



Kip Koon

***@sc.rr.com

http://www.cocopedia.com/wiki/index.php/Kip_Koon
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Dan Werner
2015-06-25 14:08:28 UTC
Permalink
A socket for a ROM chip would be handy on the new board as well :)

I like the concept of the multiple "plug in" boards, but I do agree that
one large board is easier to work with. I also would vote for the larger
FPGA. I have been working with the existing boards and have ran into
limitations on the available IO.

I would also be interested in beta testing any new boards.

Dan Werner
Post by James Moxham
Hi all,
Fair comments there with two people in a row voting for single board
rather than lots of add-on boards. We will go with that one now, and maybe
later look at the more expensive chip with 180 i/o pins. Max and I are
working on a design for an EP4CE6. Single board, 1meg of ram, vga,
keyboard, wifi, sd and either 3 or 4 RS232 ports. 10x10cm board.
Has 8 leds on the fpga board so can program the vhdl to do blinkenlights.
Just finalising a few things and then will post the design.
Cheers, James
Hi James and Max,
I like where you both are going with the new Multicomp design. The
modular design is interesting and useful for experimentation. The single
PCB with everything included is also nice and doesn’t need assembling every
time one wants to use the new Multicomp System. Both solutions have their
advantages though.
I, myself, would like the one board solution so all I need to do is pull
the completed PCB from its antistatic bag, plug up all the cables, plug up
power and start using it. I can see the usefulness for both versions, but
the single PCB is my preferred choice.
Which will cost less? That is another issue. I reckon the least
expensive solution will be the one I pick – at least in the beginning
anyway. Later on, I can see possibly getting both versions online. I will
of course go with whatever you guys decide on.
One idea I am currently working with is creating a Front Panel of lights
that will not only show the status of all the external pins of the FPGA
module that’s plugged into the Multicomp, but also all the internal
registers as well. You see with VHDL coding for the microprocessor core
implemented inside the FPGA chip, we have for the first time the potential
ability to have blinking lights for everything inside the 6809 and later
for the 6309 too once someone creates the VHDL cpu core for it. I have an
initial design for a Multiplexed Register Bus that only needs 12 pins to
implement the connection between the Multicomp and the Front Panel. This
is of course an output only display at this point. Any switches that are
needed can be implemented with a new input register for every 8 switches
required. I thought of having a full complement of switches similar to a
6809 computer I saw on the internet breadboarded with a “Front panel” like
setup which made it possible to enter binary code directly into the ram
like the original Altair did. That way, we can actually see everything
going on inside the processor and everything else as well if we like. This
would be a fantastic educational add-on to the Multicomp Design for those
that want to really learn everything the 6809 cpu has to offer and it would
be a great debugging tool as well.
When I first came up with this idea, it dawned on me that that is why the
very first mainframe computers had so many lights on them. They were
actually able to see all the registers’ contents in the computer with
them. Besides, it would look so cool as well. Ideas, comments, posers?
All positive views are most welcome. Well, this is my 2 cents worth, maybe
3. :) Take care my friends.
Kip Koon
http://www.cocopedia.com/wiki/index.php/Kip_Koon
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RHKoolaap
2015-06-25 15:04:12 UTC
Permalink
a few jumpers would work too perhaps? than you can use a RAM slot. Also an
adapter board can be used ( or if you're cheap, 2 sockets stuck together
with some wiring in between)

RHK
Post by Dan Werner
A socket for a ROM chip would be handy on the new board as well :)
I like the concept of the multiple "plug in" boards, but I do agree that
one large board is easier to work with. I also would vote for the larger
FPGA. I have been working with the existing boards and have ran into
limitations on the available IO.
I would also be interested in beta testing any new boards.
Dan Werner
Post by James Moxham
Hi all,
Fair comments there with two people in a row voting for single board
rather than lots of add-on boards. We will go with that one now, and maybe
later look at the more expensive chip with 180 i/o pins. Max and I are
working on a design for an EP4CE6. Single board, 1meg of ram, vga,
keyboard, wifi, sd and either 3 or 4 RS232 ports. 10x10cm board.
Has 8 leds on the fpga board so can program the vhdl to do blinkenlights.
Just finalising a few things and then will post the design.
Cheers, James
Hi James and Max,
I like where you both are going with the new Multicomp design. The
modular design is interesting and useful for experimentation. The single
PCB with everything included is also nice and doesn’t need assembling every
time one wants to use the new Multicomp System. Both solutions have their
advantages though.
I, myself, would like the one board solution so all I need to do is pull
the completed PCB from its antistatic bag, plug up all the cables, plug up
power and start using it. I can see the usefulness for both versions, but
the single PCB is my preferred choice.
Which will cost less? That is another issue. I reckon the least
expensive solution will be the one I pick – at least in the beginning
anyway. Later on, I can see possibly getting both versions online. I will
of course go with whatever you guys decide on.
One idea I am currently working with is creating a Front Panel of lights
that will not only show the status of all the external pins of the FPGA
module that’s plugged into the Multicomp, but also all the internal
registers as well. You see with VHDL coding for the microprocessor core
implemented inside the FPGA chip, we have for the first time the potential
ability to have blinking lights for everything inside the 6809 and later
for the 6309 too once someone creates the VHDL cpu core for it. I have an
initial design for a Multiplexed Register Bus that only needs 12 pins to
implement the connection between the Multicomp and the Front Panel. This
is of course an output only display at this point. Any switches that are
needed can be implemented with a new input register for every 8 switches
required. I thought of having a full complement of switches similar to a
6809 computer I saw on the internet breadboarded with a “Front panel” like
setup which made it possible to enter binary code directly into the ram
like the original Altair did. That way, we can actually see everything
going on inside the processor and everything else as well if we like. This
would be a fantastic educational add-on to the Multicomp Design for those
that want to really learn everything the 6809 cpu has to offer and it would
be a great debugging tool as well.
When I first came up with this idea, it dawned on me that that is why the
very first mainframe computers had so many lights on them. They were
actually able to see all the registers’ contents in the computer with
them. Besides, it would look so cool as well. Ideas, comments, posers?
All positive views are most welcome. Well, this is my 2 cents worth, maybe
3. :) Take care my friends.
Kip Koon
http://www.cocopedia.com/wiki/index.php/Kip_Koon
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Kip Koon
2015-06-25 02:13:08 UTC
Permalink
Hi James and Max,

Oh yeah, one more thing. I really like the last FPGA, the one with 180 pins with would give you guys all the pins you need as well as enough pins for everyone else to play with. Maybe even enough pins to finally create a universal CPU board for a new Microcomputer design. Who knows where this could end up. I’m already excited about all the possibilities. Anytime there’s an update to the FPGA, just program it into the FPGA on the CPU and your good to go! How about that for thinking Big! Of course we need to get the next generation Multicomp PCB designed and built first! :) See you guys Later!



Kip Koon

***@sc.rr.com

http://www.cocopedia.com/wiki/index.php/Kip_Koon





From: ***@googlegroups.com [mailto:***@googlegroups.com] On Behalf Of James Moxham
Sent: Wednesday, June 24, 2015 9:10 AM
To: ***@googlegroups.com
Subject: Re: [N8VEM: 19724] Grant Searle's multicomputer revisited; the CP/M 3 update



Ah, the import fees are an issue, I agree.



Re the AS pins, it is not a problem, the jtag port becomes a virtual AS port as well. So any fpga board we see with just one 10 pin box header on it will be fine.



I have been researching what is available on ebay at a reasonable price and what you get. Cyclone II and Cyclone IV seem to hit the sweet spot. Costs in Australian dollars, YMMV. Then went to the altera comparison page https://cloud.altera.com/ds/part/?family=cyclone-iv&device=All



Grant's board, EP2C5T144, 89 pins, $24, 4608 LEs, 119808 bits ram

Cyclone IV EP4CE6E22C8N, 92 pins, $40, 6272 LEs, 276480 bits ram

Cyclone IV EP4CE10F17C8N, 180 pins, $50, 10,320 LEs, 423536 bits ram



Grant's board certainly hits a sweet spot with price.



The board Max and I have built just now is the middle one, an EP4CE6. About 50% more LEs and more than twice the internal ram. However, only 3 more pins.



Grant's board has at least 8 unused pins, and in theory you could use these for things like more serial ports. However, then you run out of LEs. Ditto if you start adding things like banked memory - it gets very tight and it might be possible to do MP/M or a ram disk, but maybe not both.



The EP4CE6 is $40. Then if you pay another $10 the EP4CE10 gets a whole lot more. 4x the ram which means there would be video modes with 3 bits per color, which is 512 colors vs the current 32 colors. Double the number of pins. Enough LEs that you would be able to add, say, 8 serial uarts like Max would like to. Or dual VGA displays with decent color resolution like I want to. Plus dual SDs without worrying about running out of LEs or pins or both.



Everything seems to be a compromise, and there are good features of all the boards.



What I am thinking (as someone who has designed several boards now) is that a modular approach may be more flexible. Take the waveshare system which seems to have a standard of three types of breakout - 8 bits, 16 bits and 32 bits. That is pretty simple.



Take Grant's board and create some addon boards that plug into the waveshare system (see attached) so it works with all the cyclone IV boards.



Maybe then go back and create a board for the Grants Cyclone II that brings out pins in groups of 8, 16 and 32 so that the same add-on boards can be used there.



The little add-on boards I have designed are really cheap - 5x5cm and maybe $2 each.



I'd really appreciate some input on all this. I guess what I am trying to do is come up with a flexible set of boards that can be useful for those on a budget, but also can be expanded as needed into bigger and better systems.



Cheers, James Moxham







On Wed, 24 Jun 2015 21:48:22 +0930, RHKoolaap <***@gmail.com> wrote:



Hi James,

First let me thank you for your efforts you so graciously shared with us. I shamelessly incorporated your MMU.VHD in my project.



I really like the constraints of the smaller board, and I'm sure there is a lot more for me to do here. I'm only starting to get my head wrapped around VHDL and there are still plenty of pins for me to use. I think I'll stay with the Cyclone II for now



On the other hand I can sympathize with you (and Max's) efforts to use more capable hardware. By the way, checking the pin-outs, the Cyclone IV chip still has all the required configuration pins, so it should be possible to wire up an AS interface, even if the dev-board does not provide it. Or am I missing something?

I might not want to use the Cyclone IV for now, but you can rest assured I will follow whatever comes out of it. You never know what will be useful...



While I agree with you that the price for a Cyclone IV board is quite reasonable It is above the 'free to import' limit over here. meaning I have to pay the carrier a 10 euro "processing fee" and the state the 21% VAT, so the price is more like $50, plus a lot of extra hassle,



Thanks again for your work, and if my tinkering is of some use to you, so much the better.



regards, RHK
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