Discussion:
[N8VEM: 17386] Vintage + modern = fun
Nikolay Dimitrov
2014-02-23 21:52:52 UTC
Permalink
Gents,

FYI - If you love both vintage and modern electronics, this can make
your heart beat faster: mix&match Z80/6502/6809 CPU cores and
peripherals on a low cost FPGA board.

http://webcache.googleusercontent.com/search?q=cache:btyLT1AWpO8J:searle.hostei.com/grant/Multicomp/+&cd=1&hl=en&ct=clnk&gl=us

Kudos to the original author of this (already dead) site, and to a
friend of mine who shared this with me.

Kind regards,
picmaster
James Moxham
2014-02-23 22:12:04 UTC
Permalink
Fantastic find, thanks picmaster!

I have a few of those boards at home - they are very reasonably priced on
ebay. Looks like a fun project.

Cheers, James Moxham


On Mon, 24 Feb 2014 08:22:52 +1030, Nikolay Dimitrov <picmaster-***@public.gmane.org>
wrote:

> Gents,
>
> FYI - If you love both vintage and modern electronics, this can make
> your heart beat faster: mix&match Z80/6502/6809 CPU cores and
> peripherals on a low cost FPGA board.
>
> http://webcache.googleusercontent.com/search?q=cache:btyLT1AWpO8J:searle.hostei.com/grant/Multicomp/+&cd=1&hl=en&ct=clnk&gl=us
>
> Kudos to the original author of this (already dead) site, and to a
> friend of mine who shared this with me.
>
> Kind regards,
> picmaster
Andrew Bingham
2014-02-24 02:56:58 UTC
Permalink
In my thinking about doing an revised ECB Bus Monitor, one issue has been
that the current board is pretty densely populated already - there isn't a
lot of room left to add the logic needed to expand the channels the board
monitors.

One thought I've had is replacing a bunch of that logic with 1-2 CPLD
devices, PLCC in through-hole sockets. I'd be interested if people would
find this "contrary" to the hobbyist nature of the N8VEM project, or if
using a more modern tool to get everything to fit nicely on one board would
be acceptable as long as it could be programmed using typical tools we all
have.

Andrew

On Sunday, February 23, 2014 2:12:04 PM UTC-8, James Moxham (Dr_Acula)
wrote:
>
> Fantastic find, thanks picmaster!
>
> I have a few of those boards at home - they are very reasonably priced on
>
> ebay. Looks like a fun project.
>
> Cheers, James Moxham
>
>
> On Mon, 24 Feb 2014 08:22:52 +1030, Nikolay Dimitrov <picm...-***@public.gmane.org<javascript:>>
>
> wrote:
>
> > Gents,
> >
> > FYI - If you love both vintage and modern electronics, this can make
> > your heart beat faster: mix&match Z80/6502/6809 CPU cores and
> > peripherals on a low cost FPGA board.
> >
> >
> http://webcache.googleusercontent.com/search?q=cache:btyLT1AWpO8J:searle.hostei.com/grant/Multicomp/+&cd=1&hl=en&ct=clnk&gl=us
> >
> > Kudos to the original author of this (already dead) site, and to a
> > friend of mine who shared this with me.
> >
> > Kind regards,
> > picmaster
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
yoda
2014-02-24 19:11:57 UTC
Permalink
Hi Andrew

I have been contemplating the same thing. I am thinking of using them
myself but probably FPGA instead of CPLD as you can find them in developer
boards that don't require a JTAG programmer that I think some hobbyist may
disagree with another tool. These boards allow a lot of logic and use USB
to communicate with standalone tools that can download the "bitstream" I
am looking at the ones on Xess.com and numato.com. I think I like the
Saturn board from Numato as the one I will use as it has SDRAM on it with a
lot of gpio pins and could supply the memory for the system as well. I am
looking to do some hi-res graphics controller for the N8VEM and the S100
with this. With this little board as a mezzanine board should be able to
include a lot of functions or easily add them. Probably not as retro as
some would like but with the propeller chip and SD cards we have sort of
crossed that line now.

Dave

On Sunday, February 23, 2014 8:56:58 PM UTC-6, Andrew Bingham wrote:
>
> In my thinking about doing an revised ECB Bus Monitor, one issue has been
> that the current board is pretty densely populated already - there isn't a
> lot of room left to add the logic needed to expand the channels the board
> monitors.
>
> One thought I've had is replacing a bunch of that logic with 1-2 CPLD
> devices, PLCC in through-hole sockets. I'd be interested if people would
> find this "contrary" to the hobbyist nature of the N8VEM project, or if
> using a more modern tool to get everything to fit nicely on one board would
> be acceptable as long as it could be programmed using typical tools we all
> have.
>
> Andrew
>
> On Sunday, February 23, 2014 2:12:04 PM UTC-8, James Moxham (Dr_Acula)
> wrote:
>>
>> Fantastic find, thanks picmaster!
>>
>> I have a few of those boards at home - they are very reasonably priced on
>>
>> ebay. Looks like a fun project.
>>
>> Cheers, James Moxham
>>
>>
>> On Mon, 24 Feb 2014 08:22:52 +1030, Nikolay Dimitrov <picm...-***@public.gmane.org>
>> wrote:
>>
>> > Gents,
>> >
>> > FYI - If you love both vintage and modern electronics, this can make
>> > your heart beat faster: mix&match Z80/6502/6809 CPU cores and
>> > peripherals on a low cost FPGA board.
>> >
>> >
>> http://webcache.googleusercontent.com/search?q=cache:btyLT1AWpO8J:searle.hostei.com/grant/Multicomp/+&cd=1&hl=en&ct=clnk&gl=us
>> >
>> > Kudos to the original author of this (already dead) site, and to a
>> > friend of mine who shared this with me.
>> >
>> > Kind regards,
>> > picmaster
>>
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Andrew Bingham
2014-02-24 20:09:36 UTC
Permalink
I was mainly looking at using 64 or 72 macrocell CPLDs (~$3-6) to replace
the 16 (in the current implementation) to 24 (in the V2 configuration with
24 bit addresses and 16 bit data) 7400-series chips on the Bus Monitor
board with a 1-2 PLCC CPLDs.

This might also enable multiple versions of the CPLD logic to support the
"basic" LED/DIP switch version of the bus monitor and the "advanced"
version with the fancy LCD display of the data and entry of the trap
addreses (with shift registers built into the logic to move the data
to/from a microcontroller that handles the LCD replacing the LED latches
and DIP switch inputs)

It would also give flexibility for future Bus Monitor configurations with
different features by changing the internal logic.

Andrew



On Monday, February 24, 2014 11:11:57 AM UTC-8, yoda wrote:
>
> Hi Andrew
>
> I have been contemplating the same thing. I am thinking of using them
> myself but probably FPGA instead of CPLD as you can find them in developer
> boards that don't require a JTAG programmer that I think some hobbyist may
> disagree with another tool. These boards allow a lot of logic and use USB
> to communicate with standalone tools that can download the "bitstream" I
> am looking at the ones on Xess.com and numato.com. I think I like the
> Saturn board from Numato as the one I will use as it has SDRAM on it with a
> lot of gpio pins and could supply the memory for the system as well. I am
> looking to do some hi-res graphics controller for the N8VEM and the S100
> with this. With this little board as a mezzanine board should be able to
> include a lot of functions or easily add them. Probably not as retro as
> some would like but with the propeller chip and SD cards we have sort of
> crossed that line now.
>
> Dave
>
> On Sunday, February 23, 2014 8:56:58 PM UTC-6, Andrew Bingham wrote:
>>
>> In my thinking about doing an revised ECB Bus Monitor, one issue has been
>> that the current board is pretty densely populated already - there isn't a
>> lot of room left to add the logic needed to expand the channels the board
>> monitors.
>>
>> One thought I've had is replacing a bunch of that logic with 1-2 CPLD
>> devices, PLCC in through-hole sockets. I'd be interested if people would
>> find this "contrary" to the hobbyist nature of the N8VEM project, or if
>> using a more modern tool to get everything to fit nicely on one board would
>> be acceptable as long as it could be programmed using typical tools we all
>> have.
>>
>> Andrew
>>
>> On Sunday, February 23, 2014 2:12:04 PM UTC-8, James Moxham (Dr_Acula)
>> wrote:
>>>
>>> Fantastic find, thanks picmaster!
>>>
>>> I have a few of those boards at home - they are very reasonably priced
>>> on
>>> ebay. Looks like a fun project.
>>>
>>> Cheers, James Moxham
>>>
>>>
>>> On Mon, 24 Feb 2014 08:22:52 +1030, Nikolay Dimitrov <picm...-***@public.gmane.org>
>>>
>>> wrote:
>>>
>>> > Gents,
>>> >
>>> > FYI - If you love both vintage and modern electronics, this can make
>>> > your heart beat faster: mix&match Z80/6502/6809 CPU cores and
>>> > peripherals on a low cost FPGA board.
>>> >
>>> >
>>> http://webcache.googleusercontent.com/search?q=cache:btyLT1AWpO8J:searle.hostei.com/grant/Multicomp/+&cd=1&hl=en&ct=clnk&gl=us
>>> >
>>> > Kudos to the original author of this (already dead) site, and to a
>>> > friend of mine who shared this with me.
>>> >
>>> > Kind regards,
>>> > picmaster
>>>
>>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Joachim Gaßler
2014-02-24 20:10:29 UTC
Permalink
Am 24.02.2014 03:56, schrieb Andrew Bingham:
> [...]
> One thought I've had is replacing a bunch of that logic with 1-2 CPLD
> devices, PLCC in through-hole sockets. I'd be interested if people
> would find this "contrary" to the hobbyist nature of the N8VEM
> project, or if using a more modern tool to get everything to fit
> nicely on one board would be acceptable as long as it could be
> programmed using typical tools we all have.
In my opinion the usage of THT CPLDs is okay, as it shrinks the TTL
graveyard to a neatly arranged flower bed =). Another advantage of using
BST-capable CPLDs is that you use exactly one hardware device for
programming the complete board firmware - ROM as well as CPLD -, that is
the JTAG programming cable. No need to buy an extra Willem Programmer or
sth like that.

I have a pretty beautiful 6809 SBC developed using CPLDs and I find it
amazing, how simple it is to patch another piece of hardware to the
board and rearrange the logic in the CPLDs to access e.g. I2C devices or
something else.

Usage of FPGAs leaves the hobbyist range, as is requires excellent
soldering skills when you do not want to draw on preconfigured developer
boards.

Joe
Vince Mulhollon
2014-02-24 21:13:18 UTC
Permalink
On Monday, February 24, 2014 2:10:29 PM UTC-6, moustache66 wrote:

> Usage of FPGAs leaves the hobbyist range, as is requires excellent
> soldering skills when you do not want to draw on preconfigured developer
> boards.
>

Plenty of simple, huge, TQFP packages for FPGAs. Its not all BGAs. TQFP
= very easy to solder. BGA = I agree with you.

I will say the biggest annoyance is no sockets. So once that chip goes on,
and it'll probably be the first thing stuck on the board, now 100% of the
time afterwards its anti-static wrist strap time.

The big problem is now you've got a double sided PCB with like 100 signal
pins to route in about one square inch and a 1.8 volt switcher and level
converters and some manner of programming interface, at least a jtag but
preferably a full USB and support for it, and I'm not entirely sure it can
be made to work on a mere DS PCB. Might be easier to route traces for 20
TTL chips after all. Obviously if you only need 20 IO you only wire up 20
IO, and space them very far apart so a little solder bridge here or there
doesn't matter anyway. If your design doesn't connect pins 6 and 8 to
anything and there's a short from 7 to 8 it won't matter very much.. If
you implement 2of3 algorithms like "input 1" is 2of3 of pins 1 and 2 and 3,
then as long as you can avoid shorts or opens on more than 1/3 of the IO
pins you're OK, so no problemo since getting to 99% or better is not very
hard. And if you've got 100 I/O pins "only" having 33 isn't so bad.
Another strategy I've seen which is a bit ugly in my opinion is to
sacrifice IO pins on opposite sides of the package, just don't use them in
your FPGA design. Usually not very hard to find some. Then use those two
pins to superglue the chip to the board once its aligned perfectly before
even warming up the soldering iron. Don't sacrifice power/ground pins just
unused IO for this supergluing. This is a waste on a big QFP, just use
some tape to hold it down or a small weight and solder around it. Can't do
that with microwave bypass caps LOL!

I have a micronova Mercury board which I have on a S100 prototyping board
doing approx nothing so far but powering up. But its got all the level
shifting and power stuff and USB programming interface and everything all
in a DIP-64 outline (like a 68000). I'm working on way too many other
things, but eventually I have plans for this FPGA along the lines of a
floating point accelerator or maybe a smart-ish hardware I2C driver
appliance card. It doesn't have the IO to do much more. Everything takes
longer than expected, says the guy who still doesn't have his '286 board up
for no reason other than lack of lab time. The "polar vortex" has helped
me catch up quite a bit.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Nikolay Dimitrov
2014-02-24 21:29:05 UTC
Permalink
In general, the main question is "What's your motivation for building
the N8VEM computer". It can be just because you like vintage stuff, or
you like to have small hackable computer, or you want to have machine
build with modern parts/technology. As long as these groups of people
share knowledge and direction, everything will be OK. I respect that
most of the people in this community like to use TTL chips for their
projects, and I won't be the one to ruin their fun :D. On the contrary,
no-one stops me from connecting one of my FPGA boards to the SBC, or
even to implement "N8VEM-on-a-chip" (actually I secretly dream of having
a 6809 even as a soft-core, so I can explore this outstanding CPU).

I believe that if we want, we can smartly use programmable logic to
complement the mainline N8VEM development, without breaking the fun for
others. One idea such idea could be a community-designed MMU for our
boards :D?

About the actual PCBs - my understanding is that most of our hobby
systems will be able to fit in chips like Spartan-3E 500K (Papilio One),
and this thingy is not a challenge to route and solder. I would be much
more concerned about the 5V compatibility, which can be too big thing to
loose for a hobby machine.

Regards,
picmaster
Alan Hightower
2014-02-24 22:37:30 UTC
Permalink
My $.02 if you are using a 80 MHz 8 core MCU to do anything vintage =
cheating. If you are designing something at an RTL level to act like an
old chip that is hard to source = not cheating.

There are a few options:

Option #1) Use 5V PTH devices. There are plenty of devices that are 5V
or 5V tolerant. While QFPs aren't a problem for many to solder, they
still can be intimidating for some. Lattice M4s, Altera MAX 7KS's,
Atmel ATF150x's, Xilinx CRs, and others still can be sourced in PLCC.
Of those ATF150x are the only ones still in production. All of them can
be programmed through a parallel port cable that can be built from
commodity components (usually one '245 + Rs and Ds) or bought
pre-assembled off eBay for ~$15. The synthesis software can be a little
sketchy since most modern incarnations don't support the old devices and
the legacy software was generally written in the late nineties and last
supported in the early to mid-2000s.

Option #2) Get your feet wet with SPLDs first. 22V10s and 16V8s can
dramatically reduce logic while still offering builders a familiar DIP
package. They can also be programmed in most EPROM programmers. They
are also ubiquitous and many people even have them in their parts bins
already. Just enter 22V10 in the search box of any distributor and
you'll find thousands. A 22V10 has 12 dedicated inputs and 10 I/O pins
with a large combinatorial gate and a FF per I/O pin. While not
programmable, I also like the IDT700x series FIFOs for interfacing to
non-synchronous hardware - usually with programmable glue in the form of
an SPLD.

Option #3) Use pre-made EVMs. Some of the pros are usually built-in
programmers, modern devices, sometime big devices, and very fast. The
cons are generally 3.3V or less I/O and can be expensive if you are
building designs many designs with them. You can easily make the device
5V tolerant with a quick switch, however those are generally SMT as
well. You might as well solder it all if your going down that route.

Option #4) Make a dedicated project to design and build a board with a
descent sized FPGA, SDRAM, Flash, and on-board programmer, all SMT, and
find some volunteers to build them up and sell them to the group at or
near cost (raises hand as a volunteer).

I personally like MachXO2s. They have a descent size, embedded block
ram, PLLs, internal RC, can be programmed over I2C from the factory, and
have the most number of pins per package of any device (79 usable for
QFP-100 and 114 usable for QFP-144). I do have a board design I can
share with an XO2, 64MByte of SDRAM, 32 MByte of flash, 48 buffered I/Os
on .1" headers, and a small MCU to allow programming over RS-232. USB
re-programming could be added easily by swapping the MCU I'm using.

-Alan
Nikolay Dimitrov
2014-02-24 22:44:19 UTC
Permalink
Hi Alan,

Thanks for sharing these ideas, I appreciate it.
Just FYI - Cray-1 had 12 execution units running at 80 MHz back in 1976.
For me this fully qualifies as vintage.

Regards,
picmaster


On 2/25/2014 12:37 AM, Alan Hightower wrote:
>
> My $.02 if you are using a 80 MHz 8 core MCU to do anything vintage =
> cheating. If you are designing something at an RTL level to act like
> an old chip that is hard to source = not cheating.
>
> There are a few options:
>
> Option #1) Use 5V PTH devices. There are plenty of devices that are
> 5V or 5V tolerant. While QFPs aren't a problem for many to solder,
> they still can be intimidating for some. Lattice M4s, Altera MAX
> 7KS's, Atmel ATF150x's, Xilinx CRs, and others still can be sourced in
> PLCC. Of those ATF150x are the only ones still in production. All of
> them can be programmed through a parallel port cable that can be built
> from commodity components (usually one '245 + Rs and Ds) or bought
> pre-assembled off eBay for ~$15. The synthesis software can be a
> little sketchy since most modern incarnations don't support the old
> devices and the legacy software was generally written in the late
> nineties and last supported in the early to mid-2000s.
>
> Option #2) Get your feet wet with SPLDs first. 22V10s and 16V8s can
> dramatically reduce logic while still offering builders a familiar DIP
> package. They can also be programmed in most EPROM programmers. They
> are also ubiquitous and many people even have them in their parts bins
> already. Just enter 22V10 in the search box of any distributor and
> you'll find thousands. A 22V10 has 12 dedicated inputs and 10 I/O
> pins with a large combinatorial gate and a FF per I/O pin. While not
> programmable, I also like the IDT700x series FIFOs for interfacing to
> non-synchronous hardware - usually with programmable glue in the form
> of an SPLD.
>
> Option #3) Use pre-made EVMs. Some of the pros are usually built-in
> programmers, modern devices, sometime big devices, and very fast. The
> cons are generally 3.3V or less I/O and can be expensive if you are
> building designs many designs with them. You can easily make the
> device 5V tolerant with a quick switch, however those are generally
> SMT as well. You might as well solder it all if your going down that
> route.
>
> Option #4) Make a dedicated project to design and build a board with a
> descent sized FPGA, SDRAM, Flash, and on-board programmer, all SMT,
> and find some volunteers to build them up and sell them to the group
> at or near cost (raises hand as a volunteer).
>
> I personally like MachXO2s. They have a descent size, embedded block
> ram, PLLs, internal RC, can be programmed over I2C from the factory,
> and have the most number of pins per package of any device (79 usable
> for QFP-100 and 114 usable for QFP-144). I do have a board design I
> can share with an XO2, 64MByte of SDRAM, 32 MByte of flash, 48
> buffered I/Os on .1" headers, and a small MCU to allow programming
> over RS-232. USB re-programming could be added easily by swapping the
> MCU I'm using.
>
> -Alan
>
Vince Mulhollon
2014-02-24 23:00:15 UTC
Permalink
On Monday, February 24, 2014 4:37:30 PM UTC-6, AlanH wrote:

> Option #4) Make a dedicated project to design and build a board with a
> descent sized FPGA, SDRAM, Flash, and on-board programmer, all SMT, and
> find some volunteers to build them up and sell them to the group at or
> near cost (raises hand as a volunteer).
>

This is basically one of the Numato products. I am a little unclear about
its pinout but I think its thru hole compatible.

The Mercury is this minus the sdram plus 5V level shifters (note that a
decent 3.3 to 5 shifter is one chip for 8 or one fet and 3 resistors for
1) But it requires regulated +5V and only has like 30 pins. Pinout is
64dip900 just like a 68000

The Papillo is the Numato minus the sdram and its power supply loves S-100
8 volt power. I am pretty sure this is thru-hole compatible if using tall
pin headers and mounted upside down.

I have some much larger Digilent boards but making them into a S-100 card
or ECB card would be kinda ridiculous. I think they're physically too
big? Still 16 megs of sdram and VGA out and all that would make quite a
"support" board.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
James Moxham
2014-02-24 23:01:48 UTC
Permalink
Great ideas!

Brainstorming option #3, on that website is a picture of a board with 4
headers around the outside. These boards are available quite inexpensively
on ebay. I can't solder the chips, but I can make a board that could sit
under the FPGA board and could also have headers and you could bring out
the pins on very short lengths of ribbon cable. Now it is something that
anyone can solder.

I guess one challenge could be to interface it to the ECB bus. Even though
there are lots of pins on a FPGA chip, there may still not be enough to
talk to the ECB bus (unless you do clever things like share the ram pins).
So you still might need a few glue logic chips like latches to latch in
the address. Would also need extra chips also to do the 3V to 5V
conversion. So maybe that makes it genuine vintage again!

Cheers, James Moxham



On Tue, 25 Feb 2014 09:07:30 +1030, Alan Hightower <alan-***@public.gmane.org>
wrote:

>
> My $.02 if you are using a 80 MHz 8 core MCU to do anything vintage =
> cheating. If you are designing something at an RTL level to act like an
> old chip that is hard to source = not cheating.
>
> There are a few options:
>
> Option #1) Use 5V PTH devices. There are plenty of devices that are 5V
> or 5V tolerant. While QFPs aren't a problem for many to solder, they
> still can be intimidating for some. Lattice M4s, Altera MAX 7KS's,
> Atmel ATF150x's, Xilinx CRs, and others still can be sourced in PLCC.
> Of those ATF150x are the only ones still in production. All of them can
> be programmed through a parallel port cable that can be built from
> commodity components (usually one '245 + Rs and Ds) or bought
> pre-assembled off eBay for ~$15. The synthesis software can be a little
> sketchy since most modern incarnations don't support the old devices and
> the legacy software was generally written in the late nineties and last
> supported in the early to mid-2000s.
>
> Option #2) Get your feet wet with SPLDs first. 22V10s and 16V8s can
> dramatically reduce logic while still offering builders a familiar DIP
> package. They can also be programmed in most EPROM programmers. They
> are also ubiquitous and many people even have them in their parts bins
> already. Just enter 22V10 in the search box of any distributor and
> you'll find thousands. A 22V10 has 12 dedicated inputs and 10 I/O pins
> with a large combinatorial gate and a FF per I/O pin. While not
> programmable, I also like the IDT700x series FIFOs for interfacing to
> non-synchronous hardware - usually with programmable glue in the form of
> an SPLD.
>
> Option #3) Use pre-made EVMs. Some of the pros are usually built-in
> programmers, modern devices, sometime big devices, and very fast. The
> cons are generally 3.3V or less I/O and can be expensive if you are
> building designs many designs with them. You can easily make the device
> 5V tolerant with a quick switch, however those are generally SMT as
> well. You might as well solder it all if your going down that route.
>
> Option #4) Make a dedicated project to design and build a board with a
> descent sized FPGA, SDRAM, Flash, and on-board programmer, all SMT, and
> find some volunteers to build them up and sell them to the group at or
> near cost (raises hand as a volunteer).
>
> I personally like MachXO2s. They have a descent size, embedded block
> ram, PLLs, internal RC, can be programmed over I2C from the factory, and
> have the most number of pins per package of any device (79 usable for
> QFP-100 and 114 usable for QFP-144). I do have a board design I can
> share with an XO2, 64MByte of SDRAM, 32 MByte of flash, 48 buffered I/Os
> on .1" headers, and a small MCU to allow programming over RS-232. USB
> re-programming could be added easily by swapping the MCU I'm using.
>
> -Alan
Eluan Costa Miranda
2014-02-24 23:28:37 UTC
Permalink
What I find great about vintage systems is that, when well built, they tend
to last forever (for a reasonable value of forever) and that they have very
few firmwares embedded.
The only thing one should be concerned in a well preserved vintage system
is when the few ROM chips start losing their programming (when not using
mask roms). But they are easily replaceable and dumpable, while everything
else just works.
Take a modern microcomputer, for example: there's flash memory in the
motherboard, wired and wireless network, vga, hard disk, cd-rom drive, lcd
controller, keyboard bios (in notebooks), ram spd and lots of other stuff.

I may be wrong (other components may rot as fast as flash, not counting
electrolytic capacitors which are easily replaceable), but this is how I
view modern versus vintage systems.


On Mon, Feb 24, 2014 at 6:01 PM, James Moxham <moxhamj-CkBdp7X+***@public.gmane.org>wrote:

> Great ideas!
>
> Brainstorming option #3, on that website is a picture of a board with 4
> headers around the outside. These boards are available quite inexpensively
> on ebay. I can't solder the chips, but I can make a board that could sit
> under the FPGA board and could also have headers and you could bring out
> the pins on very short lengths of ribbon cable. Now it is something that
> anyone can solder.
>
> I guess one challenge could be to interface it to the ECB bus. Even though
> there are lots of pins on a FPGA chip, there may still not be enough to
> talk to the ECB bus (unless you do clever things like share the ram pins).
> So you still might need a few glue logic chips like latches to latch in the
> address. Would also need extra chips also to do the 3V to 5V conversion. So
> maybe that makes it genuine vintage again!
>
> Cheers, James Moxham
>
>
>
>
> On Tue, 25 Feb 2014 09:07:30 +1030, Alan Hightower <alan-***@public.gmane.org>
> wrote:
>
>
>> My $.02 if you are using a 80 MHz 8 core MCU to do anything vintage =
>> cheating. If you are designing something at an RTL level to act like an
>> old chip that is hard to source = not cheating.
>>
>> There are a few options:
>>
>> Option #1) Use 5V PTH devices. There are plenty of devices that are 5V
>> or 5V tolerant. While QFPs aren't a problem for many to solder, they still
>> can be intimidating for some. Lattice M4s, Altera MAX 7KS's, Atmel
>> ATF150x's, Xilinx CRs, and others still can be sourced in PLCC. Of those
>> ATF150x are the only ones still in production. All of them can be
>> programmed through a parallel port cable that can be built from commodity
>> components (usually one '245 + Rs and Ds) or bought pre-assembled off eBay
>> for ~$15. The synthesis software can be a little sketchy since most modern
>> incarnations don't support the old devices and the legacy software was
>> generally written in the late nineties and last supported in the early to
>> mid-2000s.
>>
>> Option #2) Get your feet wet with SPLDs first. 22V10s and 16V8s can
>> dramatically reduce logic while still offering builders a familiar DIP
>> package. They can also be programmed in most EPROM programmers. They are
>> also ubiquitous and many people even have them in their parts bins already.
>> Just enter 22V10 in the search box of any distributor and you'll find
>> thousands. A 22V10 has 12 dedicated inputs and 10 I/O pins with a large
>> combinatorial gate and a FF per I/O pin. While not programmable, I also
>> like the IDT700x series FIFOs for interfacing to non-synchronous hardware -
>> usually with programmable glue in the form of an SPLD.
>>
>> Option #3) Use pre-made EVMs. Some of the pros are usually built-in
>> programmers, modern devices, sometime big devices, and very fast. The cons
>> are generally 3.3V or less I/O and can be expensive if you are building
>> designs many designs with them. You can easily make the device 5V tolerant
>> with a quick switch, however those are generally SMT as well. You might as
>> well solder it all if your going down that route.
>>
>> Option #4) Make a dedicated project to design and build a board with a
>> descent sized FPGA, SDRAM, Flash, and on-board programmer, all SMT, and
>> find some volunteers to build them up and sell them to the group at or near
>> cost (raises hand as a volunteer).
>>
>> I personally like MachXO2s. They have a descent size, embedded block
>> ram, PLLs, internal RC, can be programmed over I2C from the factory, and
>> have the most number of pins per package of any device (79 usable for
>> QFP-100 and 114 usable for QFP-144). I do have a board design I can share
>> with an XO2, 64MByte of SDRAM, 32 MByte of flash, 48 buffered I/Os on .1"
>> headers, and a small MCU to allow programming over RS-232. USB
>> re-programming could be added easily by swapping the MCU I'm using.
>>
>> -Alan
>>
>
> --
> You received this message because you are subscribed to the Google Groups
> "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
James Moxham
2014-02-24 23:44:48 UTC
Permalink
Message from Grant below (there are some problems with some of the links
in the original site)

James Moxham

Hi.
Please can you let the forum know that there is a live mirror...

http://zx80.netai.net/grant/Multicomp/index.html

...until the main site comes back up.

Thanks.

Grant

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Nikolay Dimitrov
2014-02-25 06:10:11 UTC
Permalink
Hi James,

That's great news! Thanks!

Regards,
picmaster


On 2/25/2014 1:44 AM, James Moxham wrote:
> Message from Grant below (there are some problems with some of the
> links in the original site)
>
> James Moxham
>
> Hi.
> Please can you let the forum know that there is a live mirror...
>
> http://zx80.netai.net/grant/Multicomp/index.html
>
> ...until the main site comes back up.
>
> Thanks.
>
> Grant
>
>
> --
> You received this message because you are subscribed to the Google
> Groups "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send
> an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
James Moxham
2014-02-25 12:54:54 UTC
Permalink
I rummaged around in the shed and found a FPGA board - happens to be
exactly the same one Grant is using. Downloaded and ran the Quartus
software - took a while to download but it is all running. Got Grant's
files. Followed his instructions - compiled the entire emulation. It said
there were 88 warnings but it all compiled fine. Downloaded it and it said
it all downloaded fine.

So this all seems to work so far. Of course, I have no display or
peripherals or anything connected to the board, so I can't see a working
Z80 computer as yet. What I can see though is a whole lot of vhdl files
sitting in "assignments/settings". It is like a box of chips except they
are software instead of hardware. So should be possible to reconfigure
things for different displays etc.

Next step is to design a PCB - I'm thinking four female dual header
sockets laid out in the same pattern as the FPGA board. Flip the FPGA
board upside down and plug it in. Add a VGA socket, Keyboard socket, a
couple of serial ports and SD socket. If it works, time to start tweaking
things. Expand the memory from 64k to 512k with banked memory for MP/M.
Add buffer chips and an ECB plug. Should all be possible with DIP parts
and 0.1" spacing so easy to solder.

Should be fun!

Cheers, James Moxham


On Tue, 25 Feb 2014 16:40:11 +1030, Nikolay Dimitrov <picmaster-***@public.gmane.org>
wrote:

> Hi James,
>
> That's great news! Thanks!
>
> Regards,
> picmaster
>
>
> On 2/25/2014 1:44 AM, James Moxham wrote:
>> Message from Grant below (there are some problems with some of the
>> links in the original site)
>>
>> James Moxham
>>
>> Hi.
>> Please can you let the forum know that there is a live mirror...
>>
>> http://zx80.netai.net/grant/Multicomp/index.html
>>
>> ...until the main site comes back up.
>>
>> Thanks.
>>
>> Grant
>>
>>
>> --You received this message because you are subscribed to the Google
>> Groups "N8VEM" group.
>> To unsubscribe from this group and stop receiving emails from it, send
>> an email to n8vem>>+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>> Visit this group at http://groups.google.com/group/n8vem.
>> For more options, visit https://groups.google.com/groups/opt_out.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Paul Birkel
2014-02-25 13:48:58 UTC
Permalink
And don't forget those other daughter-board connectors ... like power :->.
Might want to think about removing the barrel connector and
doing-something-with-pins?


On Tue, Feb 25, 2014 at 7:54 AM, James Moxham <moxhamj-CkBdp7X+***@public.gmane.org>wrote:

> I rummaged around in the shed and found a FPGA board - happens to be
> exactly the same one Grant is using. Downloaded and ran the Quartus
> software - took a while to download but it is all running. Got Grant's
> files. Followed his instructions - compiled the entire emulation. It said
> there were 88 warnings but it all compiled fine. Downloaded it and it said
> it all downloaded fine.
>
> So this all seems to work so far. Of course, I have no display or
> peripherals or anything connected to the board, so I can't see a working
> Z80 computer as yet. What I can see though is a whole lot of vhdl files
> sitting in "assignments/settings". It is like a box of chips except they
> are software instead of hardware. So should be possible to reconfigure
> things for different displays etc.
>
> Next step is to design a PCB - I'm thinking four female dual header
> sockets laid out in the same pattern as the FPGA board. Flip the FPGA board
> upside down and plug it in. Add a VGA socket, Keyboard socket, a couple of
> serial ports and SD socket. If it works, time to start tweaking things.
> Expand the memory from 64k to 512k with banked memory for MP/M. Add buffer
> chips and an ECB plug. Should all be possible with DIP parts and 0.1"
> spacing so easy to solder.
>
> Should be fun!
>
> Cheers, James Moxham
>
>
> On Tue, 25 Feb 2014 16:40:11 +1030, Nikolay Dimitrov <picmaster-***@public.gmane.org>
> wrote:
>
> Hi James,
>
> That's great news! Thanks!
>
> Regards,
> picmaster
>
>
> On 2/25/2014 1:44 AM, James Moxham wrote:
>
> Message from Grant below (there are some problems with some of the links
> in the original site)
>
> James Moxham
>
> Hi.
> Please can you let the forum know that there is a live mirror...
>
> http://zx80.netai.net/grant/Multicomp/index.html
>
> ...until the main site comes back up.
>
> Thanks.
>
> Grant
>
>
> --
> You received this message because you are subscribed to the Google Groups
> "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.
>
>
>
>
>
> --
> You received this message because you are subscribed to the Google Groups
> "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Jim Strickland
2014-02-25 19:52:55 UTC
Permalink
On a related question, has anyone messed with 22v10 GALs and such? They
seem to be readily available at the usual suppliers, and it seems to me
(bearing in mind that I'm still working to understand how my Zeta's bank
switch logic actually works - almost got it) that one could reduce the N8
chip-select and bank-select logic to a small number of them. Also, my
minipro rom burner will program them, or so it claims. Has anyone
experimented with them?

-JRS

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Alan Hightower
2014-02-25 20:00:18 UTC
Permalink
I've used them a lot. Atmel still produces them. GAL is a name brand
owned by Lattice. Generically they are just called 22V10s and 16V8s.

Always compile your design before laying out the board. The lower pin
numbers have fewer products than the higher number input pins. So it may
matter where you connect logic. They are great for replacing comparitors
combined with mux/demuxes for address logic decode and strobe generation
(for example).

-Alan

On 2014-02-25 14:52, Jim Strickland wrote:

> On a related question, has anyone messed with 22v10 GALs and such? They seem to be readily available at the usual suppliers, and it seems to me (bearing in mind that I'm still working to understand how my Zeta's bank switch logic actually works - almost got it) that one could reduce the N8 chip-select and bank-select logic to a small number of them. Also, my minipro rom burner will program them, or so it claims. Has anyone experimented with them?
>
> -JRS
>
> --
> You received this message because you are subscribed to the Google Groups "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem [1].
> For more options, visit https://groups.google.com/groups/opt_out [2].


Links:
------
[1] http://groups.google.com/group/n8vem
[2] https://groups.google.com/groups/opt_out

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Jim Strickland
2014-02-25 21:25:22 UTC
Permalink
Ah, good to know. Thanks.
-JRS


On Tuesday, February 25, 2014 1:00:18 PM UTC-7, AlanH wrote:
>
>
>
> I've used them a lot. Atmel still produces them. GAL is a name brand
> owned by Lattice. Generically they are just called 22V10s and 16V8s.
>
> Always compile your design before laying out the board. The lower pin
> numbers have fewer products than the higher number input pins. So it may
> matter where you connect logic. They are great for replacing comparitors
> combined with mux/demuxes for address logic decode and strobe generation
> (for example).
>
> -Alan
>
> On 2014-02-25 14:52, Jim Strickland wrote:
>
> On a related question, has anyone messed with 22v10 GALs and such? They
> seem to be readily available at the usual suppliers, and it seems to me
> (bearing in mind that I'm still working to understand how my Zeta's bank
> switch logic actually works - almost got it) that one could reduce the N8
> chip-select and bank-select logic to a small number of them. Also, my
> minipro rom burner will program them, or so it claims. Has anyone
> experimented with them?
>
> -JRS
>
>
> --
> You received this message because you are subscribed to the Google Groups
> "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to n8vem+un...-/***@public.gmane.org <javascript:>.
> To post to this group, send email to n8...-/***@public.gmane.org <javascript:>.
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.
>
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
James Moxham
2014-02-27 03:43:35 UTC
Permalink
Playing around on Eagle with some board ideas for Grant's computer - see
attached.

James Moxham



On Tue, 25 Feb 2014 16:40:11 +1030, Nikolay Dimitrov <picmaster-***@public.gmane.org>
wrote:

> Hi James,
>
> That's great news! Thanks!
>
> Regards,
> picmaster
>
>
> On 2/25/2014 1:44 AM, James Moxham wrote:
>> Message from Grant below (there are some problems with some of the
>> links in the original site)
>>
>> James Moxham
>>
>> Hi.
>> Please can you let the forum know that there is a live mirror...
>>
>> http://zx80.netai.net/grant/Multicomp/index.html
>>
>> ...until the main site comes back up.
>>
>> Thanks.
>>
>> Grant
>>
>>
>> --You received this message because you are subscribed to the Google
>> Groups "N8VEM" group.
>> To unsubscribe from this group and stop receiving emails from it, send
>> an email to n8vem>>+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>> Visit this group at http://groups.google.com/group/n8vem.
>> For more options, visit https://groups.google.com/groups/opt_out.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Paul Birkel
2014-02-28 14:40:23 UTC
Permalink
I don't have enough experience to provide much constructive criticism, but
it sure looks purty ;->! Looks like you put in a position for a power-pin
to the Cyclone board, thank you. Please consider me if/when you do a
board-run; in the meantime I've ordered a Cyclone II board. Never worked
with one of those (or ilk) so I may need some guidance getting it loaded
properly when the day arrives. Grant's work looks like a lot of fun!

Maybe we should move this new activity to a new thread, appropriately named?


On Wed, Feb 26, 2014 at 10:43 PM, James Moxham <moxhamj-CkBdp7X+***@public.gmane.org>wrote:

> Playing around on Eagle with some board ideas for Grant's computer - see
> attached.
>
> James Moxham
>
>
>
> On Tue, 25 Feb 2014 16:40:11 +1030, Nikolay Dimitrov <picmaster-***@public.gmane.org>
> wrote:
>
> Hi James,
>
> That's great news! Thanks!
>
> Regards,
> picmaster
>
>
> On 2/25/2014 1:44 AM, James Moxham wrote:
>
> Message from Grant below (there are some problems with some of the links
> in the original site)
>
> James Moxham
>
> Hi.
> Please can you let the forum know that there is a live mirror...
>
> http://zx80.netai.net/grant/Multicomp/index.html
>
> ...until the main site comes back up.
>
> Thanks.
>
> Grant
>
>
> --
> You received this message because you are subscribed to the Google Groups
> "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.
>
>
>
>
>
> --
> You received this message because you are subscribed to the Google Groups
> "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
James Moxham
2014-02-28 23:04:53 UTC
Permalink
Hi Paul,

Sure, no problem making a board.

Grant and I have been brainstorming designs - attached is the latest
incarnation. Very similar to his except that:

1) 512k memory and so 3 extra address lines. Initially would just pull
these low in VHDL, but later it would be great to replicate the N8VEM bank
switching circuitry.
2) Added a touchscreen as an optional extra - will need to write software
for this. The driver code for this is available in C, so should be
possible in BDSC etc.
3) Added a 5V socket as well as the 5V pin. Build a simple 5V splitter and
run this board and the FPGA on the same wall wart.
4) Added an I2C bus - later will need to write code for this.
5) Jumpers to run the keyboard on either 3 or 5V. I think new ones run on
3V but not sure about older ones.
6) Dual Max3232 chips. Grant is using the RTS line to slow down the PC if
needed as the UART buffer is only 16 bytes, but he says that can be
increased in software if needed (eg to 256 bytes so could handle a full
xmodem packet). The CTS pin isn't needed as the PC can gobble up bytes as
fast as they are sent back.

Re the cyclone board, the download device is a USB Blaster, and some
boards come with this included. There are two sockets on the board, I
think one is for fast downloads to temp memory, and the other is for
permanent downloads. A search on ebay for "FPGA" sorted on price usually
brings up these boards. The board is about $17 and the USB Blaster about
$11.

I'm a newbie to VHDL as well. However, there is a way in Quartus to design
using schematics rather than VHDL, and you can use familiar 74xx part
numbers. Then you can convert to VHDL and get a feel for how things
translate.

James Moxham



On Sat, 01 Mar 2014 01:10:23 +1030, Paul Birkel <pbirkel-***@public.gmane.org> wrote:

> I don't have enough experience to provide much constructive criticism,
> but it sure looks purty ;->! Looks like you put in a position for a
> >power-pin to the Cyclone board, thank you. Please consider me if/when
> you do a board-run; in the meantime I've ordered a Cyclone II >board.
> Never worked with one of those (or ilk) so I may need some guidance
> getting it loaded properly when the day arrives. Grant's >work looks
> like a lot of fun!
>
> Maybe we should move this new activity to a new thread, appropriately
> named?
>
>
>
> On 2/25/2014 1:44 AM, James Moxham wrote:
>>>> Message from Grant below (there are some problems with some of the
>>>> links in the original site)
>>>>
>>>> James Moxham
>>>>
>>>> Hi.
>>>> Please can you let the forum know that there is a live mirror...
>>>>
>>>> http://zx80.netai.net/grant/Multicomp/index.html
>>>>
>>>> ...until the main site comes back up.
>>>>
>>>> Thanks.
>>>>
>>>> Grant

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Bob Grieb
2014-02-28 23:12:43 UTC
Permalink
You can probably also use Verilog as your HDL instead of VHDL.
Many people prefer Verilog as it is less verbose, and more C-like.
I know the Xilinx sw accepts both.

Bob




________________________________
From: James Moxham <moxhamj-CkBdp7X+***@public.gmane.org>
To: n8vem-/***@public.gmane.org
Sent: Friday, February 28, 2014 6:04 PM
Subject: Re: [N8VEM: 17427] Vintage + modern = fun




Hi Paul,

Sure, no problem making a board. 

Grant and I have been brainstorming designs - attached is the latest incarnation. Very similar to his except that:

1) 512k memory and so 3 extra address lines. Initially would just pull these low in VHDL, but later it would be great to replicate the N8VEM bank switching circuitry.
2) Added a touchscreen as an optional extra - will need to write software for this. The driver code for this is available in C, so should be possible in BDSC etc.
3) Added a 5V socket as well as the 5V pin. Build a simple 5V splitter and run this board and the FPGA on the same wall wart.
4) Added an I2C bus - later will need to write code for this. 
5) Jumpers to run the keyboard on either 3 or 5V. I think new ones run on 3V but not sure about older ones. 
6) Dual Max3232 chips. Grant is using the RTS line to slow down the PC if needed as the UART buffer is only 16 bytes, but he says that can be increased in software if needed (eg to 256 bytes so could handle a full xmodem packet). The CTS pin isn't needed as the PC can gobble up bytes as fast as they are sent back.

Re the cyclone board, the download device is a USB Blaster, and some boards come with this included. There are two sockets on the board, I think one is for fast downloads to temp memory, and the other is for permanent downloads. A search on ebay for "FPGA" sorted on price usually brings up these boards. The board is about $17 and the USB Blaster about $11. 

I'm a newbie to VHDL as well. However, there is a way in Quartus to design using schematics rather than VHDL, and you can use familiar 74xx part numbers. Then you can convert to VHDL and get a feel for how things translate. 

James Moxham



On Sat, 01 Mar 2014 01:10:23 +1030, Paul Birkel <pbirkel-***@public.gmane.org> wrote:


I don't have enough experience to provide much constructive criticism, but it sure looks purty ;->!  Looks like you put in a position for a power-pin to the Cyclone board, thank you.  Please consider me if/when you do a board-run; in the meantime I've ordered a Cyclone II board.  Never worked with one of those (or ilk) so I may need some guidance getting it loaded properly when the day arrives.  Grant's work looks like a lot of fun!
>
>Maybe we should move this new activity to a new thread, appropriately named?
>
>
>
>
>
>On 2/25/2014 1:44 AM, James Moxham wrote:
>
>Message from Grant below  (there are some problems with some of the links in the original site)
>>>>
>>>>
>>>>James Moxham
>>>>
>>>>
>>>>Hi.
>>>>Please can you let the forum know that there is a live mirror...
>>>>
>>>>http://zx80.netai.net/grant/Multicomp/index.html
>>>>
>>>>...until the main site comes back up.
>>>>
>>>>Thanks.
>>>>
>>>>Grant
>>>>
>>>>
>>>
>>
>>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Paul Birkel
2014-03-01 08:26:49 UTC
Permalink
James: Continue to like where you're heading, and getting Grant on-board
ought to really help with sustainment. I've ordered a USB Blaster :->.
How are you thinking of working the clearances to the Cyclone-board 2x5
sockets? Extra-tall risers from the new-board, or modify the
Cyclone-board, or ...?

I2C bus -- great! Can play with all the latest doo-dads now ... in the
comfort of that 80's style BarcaLounger :->. Touchscreen ought to be
interesting too ...

I need to find/make space to download/install Quartus. Didn't know about
the design-using-schematics option.


On Fri, Feb 28, 2014 at 6:04 PM, James Moxham <moxhamj-CkBdp7X+***@public.gmane.org>wrote:

> Hi Paul,
>
> Sure, no problem making a board.
>
> Grant and I have been brainstorming designs - attached is the latest
> incarnation. Very similar to his except that:
>
> 1) 512k memory and so 3 extra address lines. Initially would just pull
> these low in VHDL, but later it would be great to replicate the N8VEM bank
> switching circuitry.
> 2) Added a touchscreen as an optional extra - will need to write software
> for this. The driver code for this is available in C, so should be possible
> in BDSC etc.
> 3) Added a 5V socket as well as the 5V pin. Build a simple 5V splitter and
> run this board and the FPGA on the same wall wart.
> 4) Added an I2C bus - later will need to write code for this.
> 5) Jumpers to run the keyboard on either 3 or 5V. I think new ones run on
> 3V but not sure about older ones.
> 6) Dual Max3232 chips. Grant is using the RTS line to slow down the PC if
> needed as the UART buffer is only 16 bytes, but he says that can be
> increased in software if needed (eg to 256 bytes so could handle a full
> xmodem packet). The CTS pin isn't needed as the PC can gobble up bytes as
> fast as they are sent back.
>
> Re the cyclone board, the download device is a USB Blaster, and some
> boards come with this included. There are two sockets on the board, I think
> one is for fast downloads to temp memory, and the other is for permanent
> downloads. A search on ebay for "FPGA" sorted on price usually brings up
> these boards. The board is about $17 and the USB Blaster about $11.
>
> I'm a newbie to VHDL as well. However, there is a way in Quartus to design
> using schematics rather than VHDL, and you can use familiar 74xx part
> numbers. Then you can convert to VHDL and get a feel for how things
> translate.
>
> James Moxham
>
>
>
> On Sat, 01 Mar 2014 01:10:23 +1030, Paul Birkel <pbirkel-***@public.gmane.org> wrote:
>
> I don't have enough experience to provide much constructive criticism, but
> it sure looks purty ;->! Looks like you put in a position for a power-pin
> to the Cyclone board, thank you. Please consider me if/when you do a
> board-run; in the meantime I've ordered a Cyclone II board. Never worked
> with one of those (or ilk) so I may need some guidance getting it loaded
> properly when the day arrives. Grant's work looks like a lot of fun!
>
> Maybe we should move this new activity to a new thread, appropriately
> named?
>
>
>
> On 2/25/2014 1:44 AM, James Moxham wrote:
>
>> Message from Grant below (there are some problems with some of the
>> links in the original site)
>>
>> James Moxham
>>
>> Hi.
>> Please can you let the forum know that there is a live mirror...
>>
>> http://zx80.netai.net/grant/Multicomp/index.html
>>
>> ...until the main site comes back up.
>>
>> Thanks.
>>
>> Grant
>>
>>
>>
>>
>>
> --
> You received this message because you are subscribed to the Google Groups
> "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
James Moxham
2014-03-01 08:46:32 UTC
Permalink
What I'm thinking with the sockets is to put female sockets on this new
board, and then flip the FPGA board upside down and plug it in. "Double
Row Female Headers" about half way down this page
http://www.futurlec.com/ConnHead.shtml There is no 28 pin header but we
could use two 14 pin ones side by side.

Should be easier than trying to solder all those tiny pins :)


On Sat, 01 Mar 2014 18:56:49 +1030, Paul Birkel <pbirkel-***@public.gmane.org> wrote:

> James: Continue to like where you're heading, and getting Grant
> on-board ought to really help with sustainment. I've ordered a USB
> >Blaster :->. How are you thinking of working the clearances to the
> Cyclone-board 2x5 sockets? Extra-tall risers from the new-board, or
> >modify the Cyclone-board, or ...?
>
> I2C bus -- great! Can play with all the latest doo-dads now ... in the
> comfort of that 80's style BarcaLounger :->. Touchscreen ought to >be
> interesting too ...
>
> I need to find/make space to download/install Quartus. Didn't know
> about the design-using-schematics option.
>
>
> On Fri, Feb 28, 2014 at 6:04 PM, James Moxham <moxhamj-CkBdp7X+***@public.gmane.org>
> wrote:
>> Hi Paul,
>>
>> Sure, no problem making a board.
>> Grant and I have been brainstorming designs - attached is the latest
>> incarnation. Very similar to his except that:
>>
>> 1) 512k memory and so 3 extra address lines. Initially would just pull
>> these low in VHDL, but later it would be great to replicate the >>N8VEM
>> bank switching circuitry.
>> 2) Added a touchscreen as an optional extra - will need to write
>> software for this. The driver code for this is available in C, so
>> should >>be possible in BDSC etc.
>> 3) Added a 5V socket as well as the 5V pin. Build a simple 5V splitter
>> and run this board and the FPGA on the same wall wart.
>> 4) Added an I2C bus - later will need to write code for this.5) Jumpers
>> to run the keyboard on either 3 or 5V. I think new ones run on 3V but
>> not sure about older ones.6) Dual Max3232 chips. Grant is using the RTS
>> line to slow down the PC if needed as the UART buffer is only 16 bytes,
>> but he says >>that can be increased in software if needed (eg to 256
>> bytes so could handle a full xmodem packet). The CTS pin isn't needed
>> as the >>PC can gobble up bytes as fast as they are sent back.
>>
>> Re the cyclone board, the download device is a USB Blaster, and some
>> boards come with this included. There are two sockets on the >>board, I
>> think one is for fast downloads to temp memory, and the other is for
>> permanent downloads. A search on ebay for "FPGA" >>sorted on price
>> usually brings up these boards. The board is about $17 and the USB
>> Blaster about $11.
>> I'm a newbie to VHDL as well. However, there is a way in Quartus to
>> design using schematics rather than VHDL, and you can use >>familiar
>> 74xx part numbers. Then you can convert to VHDL and get a feel for how
>> things translate.
>>>> James Moxham
>>
>>
>>
>> On Sat, 01 Mar 2014 01:10:23 +1030, Paul Birkel <pbirkel-***@public.gmane.org>
>> wrote:
>>
>>> I don't have enough experience to provide much constructive criticism,
>>> but it sure looks purty ;->! Looks like you put in a position >>>for
>>> a power-pin to the Cyclone board, thank you. Please consider me
>>> if/when you do a board-run; in the meantime I've ordered a >>>Cyclone
>>> II board. Never worked with one of those (or ilk) so I may need some
>>> guidance getting it loaded properly when the day >>>arrives. Grant's
>>> work looks like a lot of fun!
>>>
>>> Maybe we should move this new activity to a new thread, appropriately
>>> named?
>>>
>>>
>>>
>>> On 2/25/2014 1:44 AM, James Moxham wrote:
>>>>>> Message from Grant below (there are some problems with some of the
>>>>>> links in the original site)
>>>>>>
>>>>>> James Moxham
>>>>>>
>>>>>> Hi.
>>>>>> Please can you let the forum know that there is a live mirror...
>>>>>>
>>>>>> http://zx80.netai.net/grant/Multicomp/index.html
>>>>>>
>>>>>> ...until the main site comes back up.
>>>>>>
>>>>>> Thanks.
>>>>>>
>>>>>> Grant
>>>>>>
>>>>>
>>>>
>>>>
>>
>> --You received this message because you are subscribed to the Google
>> Groups "N8VEM" group.
>> To unsubscribe from this group and stop receiving emails from it, send
>> an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>> Visit this group at http://groups.google.com/group/n8vem.
>> For more options, visit https://groups.google.com/groups/opt_out.
>
> --You received this message because you are subscribed to the Google
> Groups "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send
> an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Paul Birkel
2014-03-01 09:22:10 UTC
Permalink
Got that and fully agree with your design approach. My concern was with
the pair of 2x5 shrouded connectors on the Cyclone II board. Don't have any
dimensional measurements for that board, so ... do they simply end up
hanging off/over the lower (or left?) edge of your board and not
interfering with the board edge? "Eyeballing" from here leaves me
concerned that the first 2x5 shrouded connector may be very close to your
board-edge on that side, or actually overlap it? (Actually, I'm not sure
which board-edge that would be as I'm not sure in your layout which side is
"up" and would hold the headers.)


On Sat, Mar 1, 2014 at 3:46 AM, James Moxham <moxhamj-CkBdp7X+***@public.gmane.org>wrote:

> What I'm thinking with the sockets is to put female sockets on this new
> board, and then flip the FPGA board upside down and plug it in. "Double
> Row Female Headers" about half way down this page
> http://www.futurlec.com/ConnHead.shtml There is no 28 pin header but we
> could use two 14 pin ones side by side.
>
> Should be easier than trying to solder all those tiny pins :)
>
>
> On Sat, 01 Mar 2014 18:56:49 +1030, Paul Birkel <pbirkel-***@public.gmane.org> wrote:
>
> James: Continue to like where you're heading, and getting Grant on-board
> ought to really help with sustainment. I've ordered a USB Blaster :->.
> How are you thinking of working the clearances to the Cyclone-board 2x5
> sockets? Extra-tall risers from the new-board, or modify the
> Cyclone-board, or ...?
>
> I2C bus -- great! Can play with all the latest doo-dads now ... in the
> comfort of that 80's style BarcaLounger :->. Touchscreen ought to be
> interesting too ...
>
> I need to find/make space to download/install Quartus. Didn't know about
> the design-using-schematics option.
>
>
> On Fri, Feb 28, 2014 at 6:04 PM, James Moxham <moxhamj-CkBdp7X+***@public.gmane.org>wrote:
>
>> Hi Paul,
>>
>> Sure, no problem making a board.
>>
>> Grant and I have been brainstorming designs - attached is the latest
>> incarnation. Very similar to his except that:
>>
>> 1) 512k memory and so 3 extra address lines. Initially would just pull
>> these low in VHDL, but later it would be great to replicate the N8VEM bank
>> switching circuitry.
>> 2) Added a touchscreen as an optional extra - will need to write software
>> for this. The driver code for this is available in C, so should be possible
>> in BDSC etc.
>> 3) Added a 5V socket as well as the 5V pin. Build a simple 5V splitter
>> and run this board and the FPGA on the same wall wart.
>> 4) Added an I2C bus - later will need to write code for this.
>> 5) Jumpers to run the keyboard on either 3 or 5V. I think new ones run on
>> 3V but not sure about older ones.
>> 6) Dual Max3232 chips. Grant is using the RTS line to slow down the PC if
>> needed as the UART buffer is only 16 bytes, but he says that can be
>> increased in software if needed (eg to 256 bytes so could handle a full
>> xmodem packet). The CTS pin isn't needed as the PC can gobble up bytes as
>> fast as they are sent back.
>>
>> Re the cyclone board, the download device is a USB Blaster, and some
>> boards come with this included. There are two sockets on the board, I think
>> one is for fast downloads to temp memory, and the other is for permanent
>> downloads. A search on ebay for "FPGA" sorted on price usually brings up
>> these boards. The board is about $17 and the USB Blaster about $11.
>>
>> I'm a newbie to VHDL as well. However, there is a way in Quartus to
>> design using schematics rather than VHDL, and you can use familiar 74xx
>> part numbers. Then you can convert to VHDL and get a feel for how things
>> translate.
>>
>> James Moxham
>>
>>
>>
>> On Sat, 01 Mar 2014 01:10:23 +1030, Paul Birkel <pbirkel-***@public.gmane.org>
>> wrote:
>>
>> I don't have enough experience to provide much constructive criticism,
>> but it sure looks purty ;->! Looks like you put in a position for a
>> power-pin to the Cyclone board, thank you. Please consider me if/when you
>> do a board-run; in the meantime I've ordered a Cyclone II board. Never
>> worked with one of those (or ilk) so I may need some guidance getting it
>> loaded properly when the day arrives. Grant's work looks like a lot of fun!
>>
>> Maybe we should move this new activity to a new thread, appropriately
>> named?
>>
>>
>>
>> On 2/25/2014 1:44 AM, James Moxham wrote:
>>
>>> Message from Grant below (there are some problems with some of the
>>> links in the original site)
>>>
>>> James Moxham
>>>
>>> Hi.
>>> Please can you let the forum know that there is a live mirror...
>>>
>>> http://zx80.netai.net/grant/Multicomp/index.html
>>>
>>> ...until the main site comes back up.
>>>
>>> Thanks.
>>>
>>> Grant
>>>
>>>
>>>
>>>
>>>
>> --
>> You received this message because you are subscribed to the Google Groups
>> "N8VEM" group.
>> To unsubscribe from this group and stop receiving emails from it, send an
>> email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>> Visit this group at http://groups.google.com/group/n8vem.
>> For more options, visit https://groups.google.com/groups/opt_out.
>>
>
> --
> You received this message because you are subscribed to the Google Groups
> "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.
>
>
>
>
> --
> You received this message because you are subscribed to the Google Groups
> "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
James Moxham
2014-03-01 13:39:17 UTC
Permalink
Ah yes, I see what you mean. I tried plugging it into another board I have
with a female header. Very close but just fits. Hopefully should work out
:)


On Sat, 01 Mar 2014 19:52:10 +1030, Paul Birkel <pbirkel-***@public.gmane.org> wrote:

> Got that and fully agree with your design approach. My concern was with
> the pair of 2x5 shrouded connectors on the Cyclone II board. >Don't have
> any dimensional measurements for that board, so ... do they simply end
> up hanging off/over the lower (or left?) edge of your >board and not
> interfering with the board edge? "Eyeballing" from here leaves me
> concerned that the first 2x5 shrouded connector may >be very close to
> your board-edge on that side, or actually overlap it? (Actually, I'm
> not sure which board-edge that would be as I'm not >sure in your layout
> which side is "up" and would hold the headers.)
>
>
> On Sat, Mar 1, 2014 at 3:46 AM, James Moxham <moxhamj-CkBdp7X+***@public.gmane.org>
> wrote:
>> What I'm thinking with the sockets is to put female sockets on this new
>> board, and then flip the FPGA board upside down and plug it >>in.
>> "Double Row Female Headers" about half way down this page
>> http://www.futurlec.com/ConnHead.shtml There is no 28 pin >>header
>> but we could use two 14 pin ones side by side.
>> Should be easier than trying to solder all those tiny pins :)
>>
>>
>> On Sat, 01 Mar 2014 18:56:49 +1030, Paul Birkel <pbirkel-***@public.gmane.org>
>> wrote:
>>
>>> James: Continue to like where you're heading, and getting Grant
>>> on-board ought to really help with sustainment. I've ordered a USB
>>> >>>Blaster :->. How are you thinking of working the clearances to the
>>> Cyclone-board 2x5 sockets? Extra-tall risers from the new-board,
>>> >>>or modify the Cyclone-board, or ...?
>>>
>>> I2C bus -- great! Can play with all the latest doo-dads now ... in
>>> the comfort of that 80's style BarcaLounger :->. Touchscreen ought
>>> >>>to be interesting too ...
>>>
>>> I need to find/make space to download/install Quartus. Didn't know
>>> about the design-using-schematics option.
>>>
>>>
>>> On Fri, Feb 28, 2014 at 6:04 PM, James Moxham
>>> <moxhamj-CkBdp7X+***@public.gmane.org> wrote:
>>>> Hi Paul,
>>>>
>>>> Sure, no problem making a board.
>>>> Grant and I have been brainstorming designs - attached is the latest
>>>> incarnation. Very similar to his except that:
>>>>
>>>> 1) 512k memory and so 3 extra address lines. Initially would just
>>>> pull these low in VHDL, but later it would be great to replicate the
>>>> >>>>N8VEM bank switching circuitry.
>>>> 2) Added a touchscreen as an optional extra - will need to write
>>>> software for this. The driver code for this is available in C, so
>>>> >>>>should be possible in BDSC etc.
>>>> 3) Added a 5V socket as well as the 5V pin. Build a simple 5V
>>>> splitter and run this board and the FPGA on the same wall wart.
>>>> 4) Added an I2C bus - later will need to write code for this.5)
>>>> Jumpers to run the keyboard on either 3 or 5V. I think new ones run
>>>> on 3V but not sure about older ones.6) Dual Max3232 chips. Grant is
>>>> using the RTS line to slow down the PC if needed as the UART buffer
>>>> is only 16 bytes, but he >>>>says that can be increased in software
>>>> if needed (eg to 256 bytes so could handle a full xmodem packet). The
>>>> CTS pin isn't needed >>>>as the PC can gobble up bytes as fast as
>>>> they are sent back.
>>>>
>>>> Re the cyclone board, the download device is a USB Blaster, and some
>>>> boards come with this included. There are two sockets on >>>>the
>>>> board, I think one is for fast downloads to temp memory, and the
>>>> other is for permanent downloads. A search on ebay for >>>>"FPGA"
>>>> sorted on price usually brings up these boards. The board is about
>>>> $17 and the USB Blaster about $11.
>>>> I'm a newbie to VHDL as well. However, there is a way in Quartus to
>>>> design using schematics rather than VHDL, and you can use
>>>> >>>>familiar 74xx part numbers. Then you can convert to VHDL and get
>>>> a feel for how things translate.
>>>>>>>> James Moxham
>>>>
>>>>
>>>>
>>>> On Sat, 01 Mar 2014 01:10:23 +1030, Paul Birkel <pbirkel-***@public.gmane.org>
>>>> wrote:
>>>>
>>>>> I don't have enough experience to provide much constructive
>>>>> criticism, but it sure looks purty ;->! Looks like you put in a
>>>>> >>>>>position for a power-pin to the Cyclone board, thank you.
>>>>> Please consider me if/when you do a board-run; in the meantime I've
>>>>> >>>>>ordered a Cyclone II board. Never worked with one of those (or
>>>>> ilk) so I may need some guidance getting it loaded properly
>>>>> >>>>>when the day arrives. Grant's work looks like a lot of fun!
>>>>>
>>>>> Maybe we should move this new activity to a new thread,
>>>>> appropriately named?
>>>>>
>>>>>
>>>>>
>>>>> On 2/25/2014 1:44 AM, James Moxham wrote:
>>>>>>>> Message from Grant below (there are some problems with some of
>>>>>>>> the links in the original site)
>>>>>>>>
>>>>>>>> James Moxham
>>>>>>>>
>>>>>>>> Hi.
>>>>>>>> Please can you let the forum know that there is a live mirror...
>>>>>>>>
>>>>>>>> http://zx80.netai.net/grant/Multicomp/index.html
>>>>>>>>
>>>>>>>> ...until the main site comes back up.
>>>>>>>>
>>>>>>>> Thanks.
>>>>>>>>
>>>>>>>> Grant
>>>>>>>>
>>>>>>>
>>>>>>
>>>>>>
>>>>
>>>> --You received this message because you are subscribed to the Google
>>>> Groups "N8VEM" group.
>>>> To unsubscribe from this group and stop receiving emails from it,
>>>> send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>>>> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>>>> Visit this group at http://groups.google.com/group/n8vem.
>>>> For more options, visit https://groups.google.com/groups/opt_out.
>>>
>>> --You received this message because you are subscribed to the Google
>>> Groups "N8VEM" group.
>>> To unsubscribe from this group and stop receiving emails from it, send
>>> an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>>> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>>> Visit this group at http://groups.google.com/group/n8vem.
>>> For more options, visit https://groups.google.com/groups/opt_out.
>>
>>
>>
>> --You received this message because you are subscribed to the Google
>> Groups "N8VEM" group.
>> To unsubscribe from this group and stop receiving emails from it, send
>> an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>> Visit this group at http://groups.google.com/group/n8vem.
>> For more options, visit https://groups.google.com/groups/opt_out.
>
> --You received this message because you are subscribed to the Google
> Groups "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send
> an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Nikolay Dimitrov
2014-03-01 11:17:21 UTC
Permalink
Hi James,

About the N8VEM bank switching - that's great idea. It would be perfect
if the FPGA implementations of N8VEM use the same SW releases and behave
the same way as the original board, to avoid confusion and fragmentation.
5V compatibility - yep, FPGAs will be "aliens in the TTL world" without
this.
UART FIFO is 16 bytes, and I can say this is perfectly fine, compared to
others (there are some automotive ECUs, like NEC V850, with 1 byte FIFO
where you can even pretend that it doesn't loose all its data traffic :D).
For the VHDL - please be kind and use generic interfaces to the IP
blocks, which doesn't expose the FPGA vendor technology, so we can
easily implement Altera/Xilinx/Other implementations.

And finally, for the schematic entry - in long run this doesn't scale
well at all. Could be good for the initial take-off (although I never
did this in the past), it's very important for HDL designer to
understand how behavioral description works. I personally prefer Verilog
for my projects, but I won't start religious war for this - I can read
somehow VHDL, both HDLs can be mixed in the same project, and there are
enough nice projects out there using VHDL which I don't want to miss.

The only thing which is left as a major concern for implementing our
hobby logic inside FPGA is that these chips are inherently synchronous,
which means we can't just put code without clock and expect it to work.
The issue typically is that even if the LUT can work asynchronously, the
LUT output is usually registered, and needs a clock. Please tell me if
I'm wrong.

Regards,
picmaster


On 3/1/2014 1:04 AM, James Moxham wrote:
> Hi Paul,
>
> Sure, no problem making a board.
>
> Grant and I have been brainstorming designs - attached is the latest
> incarnation. Very similar to his except that:
>
> 1) 512k memory and so 3 extra address lines. Initially would just pull
> these low in VHDL, but later it would be great to replicate the N8VEM
> bank switching circuitry.
> 2) Added a touchscreen as an optional extra - will need to write
> software for this. The driver code for this is available in C, so
> should be possible in BDSC etc.
> 3) Added a 5V socket as well as the 5V pin. Build a simple 5V splitter
> and run this board and the FPGA on the same wall wart.
> 4) Added an I2C bus - later will need to write code for this.
> 5) Jumpers to run the keyboard on either 3 or 5V. I think new ones run
> on 3V but not sure about older ones.
> 6) Dual Max3232 chips. Grant is using the RTS line to slow down the PC
> if needed as the UART buffer is only 16 bytes, but he says that can be
> increased in software if needed (eg to 256 bytes so could handle a
> full xmodem packet). The CTS pin isn't needed as the PC can gobble up
> bytes as fast as they are sent back.
>
> Re the cyclone board, the download device is a USB Blaster, and some
> boards come with this included. There are two sockets on the board, I
> think one is for fast downloads to temp memory, and the other is for
> permanent downloads. A search on ebay for "FPGA" sorted on price
> usually brings up these boards. The board is about $17 and the USB
> Blaster about $11.
>
> I'm a newbie to VHDL as well. However, there is a way in Quartus to
> design using schematics rather than VHDL, and you can use familiar
> 74xx part numbers. Then you can convert to VHDL and get a feel for how
> things translate.
>
> James Moxham
>
>
>
> On Sat, 01 Mar 2014 01:10:23 +1030, Paul Birkel <pbirkel-***@public.gmane.org> wrote:
>
> I don't have enough experience to provide much constructive
> criticism, but it sure looks purty ;->! Looks like you put in a
> position for a power-pin to the Cyclone board, thank you. Please
> consider me if/when you do a board-run; in the meantime I've
> ordered a Cyclone II board. Never worked with one of those (or
> ilk) so I may need some guidance getting it loaded properly when
> the day arrives. Grant's work looks like a lot of fun!
>
> Maybe we should move this new activity to a new thread,
> appropriately named?
>
>
>
> On 2/25/2014 1:44 AM, James Moxham wrote:
>
>> Message from Grant below (there are some problems with
>> some of the links in the original site)
>>
>> James Moxham
>>
>> Hi.
>> Please can you let the forum know that there is a live
>> mirror...
>>
>> http://zx80.netai.net/grant/Multicomp/index.html
>>
>> ...until the main site comes back up.
>>
>> Thanks.
>>
>> Grant
>>
>
>
>
>
> --
> You received this message because you are subscribed to the Google
> Groups "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send
> an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Paul Birkel
2014-03-01 11:30:38 UTC
Permalink
VHDL vs. Verilog?

1. Personally, I want to learn VHDL. I (beginner!) like wordiness (and
clarity!).

2. Regardless of personal preferences, we're using what Grant has already
developed (VHDL, right?) so logically we should extend from there ...
consistently.

Completely agree that good/abstract interfaces are valuable and should be
adopted for new work, but I recommend that we don't start by rewriting
Grant's existing work at the get-go :->.


On Sat, Mar 1, 2014 at 6:17 AM, Nikolay Dimitrov <picmaster-***@public.gmane.org> wrote:

> Hi James,
>
> About the N8VEM bank switching - that's great idea. It would be perfect if
> the FPGA implementations of N8VEM use the same SW releases and behave the
> same way as the original board, to avoid confusion and fragmentation.
> 5V compatibility - yep, FPGAs will be "aliens in the TTL world" without
> this.
> UART FIFO is 16 bytes, and I can say this is perfectly fine, compared to
> others (there are some automotive ECUs, like NEC V850, with 1 byte FIFO
> where you can even pretend that it doesn't loose all its data traffic :D).
> For the VHDL - please be kind and use generic interfaces to the IP blocks,
> which doesn't expose the FPGA vendor technology, so we can easily implement
> Altera/Xilinx/Other implementations.
>
> And finally, for the schematic entry - in long run this doesn't scale well
> at all. Could be good for the initial take-off (although I never did this
> in the past), it's very important for HDL designer to understand how
> behavioral description works. I personally prefer Verilog for my projects,
> but I won't start religious war for this - I can read somehow VHDL, both
> HDLs can be mixed in the same project, and there are enough nice projects
> out there using VHDL which I don't want to miss.
>
> The only thing which is left as a major concern for implementing our hobby
> logic inside FPGA is that these chips are inherently synchronous, which
> means we can't just put code without clock and expect it to work. The issue
> typically is that even if the LUT can work asynchronously, the LUT output
> is usually registered, and needs a clock. Please tell me if I'm wrong.
>
> Regards,
> picmaster
>
>
>
> On 3/1/2014 1:04 AM, James Moxham wrote:
>
> Hi Paul,
>
> Sure, no problem making a board.
>
> Grant and I have been brainstorming designs - attached is the latest
> incarnation. Very similar to his except that:
>
> 1) 512k memory and so 3 extra address lines. Initially would just pull
> these low in VHDL, but later it would be great to replicate the N8VEM bank
> switching circuitry.
> 2) Added a touchscreen as an optional extra - will need to write software
> for this. The driver code for this is available in C, so should be possible
> in BDSC etc.
> 3) Added a 5V socket as well as the 5V pin. Build a simple 5V splitter and
> run this board and the FPGA on the same wall wart.
> 4) Added an I2C bus - later will need to write code for this.
> 5) Jumpers to run the keyboard on either 3 or 5V. I think new ones run on
> 3V but not sure about older ones.
> 6) Dual Max3232 chips. Grant is using the RTS line to slow down the PC if
> needed as the UART buffer is only 16 bytes, but he says that can be
> increased in software if needed (eg to 256 bytes so could handle a full
> xmodem packet). The CTS pin isn't needed as the PC can gobble up bytes as
> fast as they are sent back.
>
> Re the cyclone board, the download device is a USB Blaster, and some
> boards come with this included. There are two sockets on the board, I think
> one is for fast downloads to temp memory, and the other is for permanent
> downloads. A search on ebay for "FPGA" sorted on price usually brings up
> these boards. The board is about $17 and the USB Blaster about $11.
>
> I'm a newbie to VHDL as well. However, there is a way in Quartus to
> design using schematics rather than VHDL, and you can use familiar 74xx
> part numbers. Then you can convert to VHDL and get a feel for how things
> translate.
>
> James Moxham
>
>
>
> On Sat, 01 Mar 2014 01:10:23 +1030, Paul Birkel <pbirkel-***@public.gmane.org><pbirkel-***@public.gmane.org>wrote:
>
> I don't have enough experience to provide much constructive criticism,
> but it sure looks purty ;->! Looks like you put in a position for a
> power-pin to the Cyclone board, thank you. Please consider me if/when you
> do a board-run; in the meantime I've ordered a Cyclone II board. Never
> worked with one of those (or ilk) so I may need some guidance getting it
> loaded properly when the day arrives. Grant's work looks like a lot of fun!
>
> Maybe we should move this new activity to a new thread, appropriately
> named?
>
>
>
> On 2/25/2014 1:44 AM, James Moxham wrote:
>
>> Message from Grant below (there are some problems with some of the
>> links in the original site)
>>
>> James Moxham
>>
>> Hi.
>> Please can you let the forum know that there is a live mirror...
>>
>> http://zx80.netai.net/grant/Multicomp/index.html
>>
>> ...until the main site comes back up.
>>
>> Thanks.
>>
>> Grant
>>
>>
>>
>>
>>
> --
> You received this message because you are subscribed to the Google Groups
> "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.
>
>
> --
> You received this message because you are subscribed to the Google Groups
> "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Nikolay Dimitrov
2014-03-01 11:36:21 UTC
Permalink
Hi Paul,

Can't agree more. As I said, I respect that other guys use VHDL, and
would prefer to improve my skills in this area instead of arguing with
others.

Kind regards,
picmaster


On 3/1/2014 1:30 PM, Paul Birkel wrote:
> VHDL vs. Verilog?
>
> 1. Personally, I want to learn VHDL. I (beginner!) like wordiness (and
> clarity!).
>
> 2. Regardless of personal preferences, we're using what Grant has
> already developed (VHDL, right?) so logically we should extend from
> there ... consistently.
>
> Completely agree that good/abstract interfaces are valuable and should
> be adopted for new work, but I recommend that we don't start by
> rewriting Grant's existing work at the get-go :->.
>
>
> On Sat, Mar 1, 2014 at 6:17 AM, Nikolay Dimitrov <picmaster-***@public.gmane.org
> <mailto:picmaster-***@public.gmane.org>> wrote:
>
> Hi James,
>
> About the N8VEM bank switching - that's great idea. It would be
> perfect if the FPGA implementations of N8VEM use the same SW
> releases and behave the same way as the original board, to avoid
> confusion and fragmentation.
> 5V compatibility - yep, FPGAs will be "aliens in the TTL world"
> without this.
> UART FIFO is 16 bytes, and I can say this is perfectly fine,
> compared to others (there are some automotive ECUs, like NEC V850,
> with 1 byte FIFO where you can even pretend that it doesn't loose
> all its data traffic :D).
> For the VHDL - please be kind and use generic interfaces to the IP
> blocks, which doesn't expose the FPGA vendor technology, so we can
> easily implement Altera/Xilinx/Other implementations.
>
> And finally, for the schematic entry - in long run this doesn't
> scale well at all. Could be good for the initial take-off
> (although I never did this in the past), it's very important for
> HDL designer to understand how behavioral description works. I
> personally prefer Verilog for my projects, but I won't start
> religious war for this - I can read somehow VHDL, both HDLs can
> be mixed in the same project, and there are enough nice projects
> out there using VHDL which I don't want to miss.
>
> The only thing which is left as a major concern for implementing
> our hobby logic inside FPGA is that these chips are inherently
> synchronous, which means we can't just put code without clock and
> expect it to work. The issue typically is that even if the LUT can
> work asynchronously, the LUT output is usually registered, and
> needs a clock. Please tell me if I'm wrong.
>
> Regards,
> picmaster
>
>
>
> On 3/1/2014 1:04 AM, James Moxham wrote:
>> Hi Paul,
>>
>> Sure, no problem making a board.
>>
>> Grant and I have been brainstorming designs - attached is the
>> latest incarnation. Very similar to his except that:
>>
>> 1) 512k memory and so 3 extra address lines. Initially would just
>> pull these low in VHDL, but later it would be great to replicate
>> the N8VEM bank switching circuitry.
>> 2) Added a touchscreen as an optional extra - will need to write
>> software for this. The driver code for this is available in C, so
>> should be possible in BDSC etc.
>> 3) Added a 5V socket as well as the 5V pin. Build a simple 5V
>> splitter and run this board and the FPGA on the same wall wart.
>> 4) Added an I2C bus - later will need to write code for this.
>> 5) Jumpers to run the keyboard on either 3 or 5V. I think new
>> ones run on 3V but not sure about older ones.
>> 6) Dual Max3232 chips. Grant is using the RTS line to slow down
>> the PC if needed as the UART buffer is only 16 bytes, but he says
>> that can be increased in software if needed (eg to 256 bytes so
>> could handle a full xmodem packet). The CTS pin isn't needed as
>> the PC can gobble up bytes as fast as they are sent back.
>>
>> Re the cyclone board, the download device is a USB Blaster, and
>> some boards come with this included. There are two sockets on the
>> board, I think one is for fast downloads to temp memory, and the
>> other is for permanent downloads. A search on ebay for "FPGA"
>> sorted on price usually brings up these boards. The board is
>> about $17 and the USB Blaster about $11.
>>
>> I'm a newbie to VHDL as well. However, there is a way in Quartus
>> to design using schematics rather than VHDL, and you can use
>> familiar 74xx part numbers. Then you can convert to VHDL and get
>> a feel for how things translate.
>>
>> James Moxham
>>
>>
>>
>> On Sat, 01 Mar 2014 01:10:23 +1030, Paul Birkel
>> <pbirkel-***@public.gmane.org> <mailto:pbirkel-***@public.gmane.org> wrote:
>>
>> I don't have enough experience to provide much constructive
>> criticism, but it sure looks purty ;->! Looks like you put
>> in a position for a power-pin to the Cyclone board, thank
>> you. Please consider me if/when you do a board-run; in the
>> meantime I've ordered a Cyclone II board. Never worked with
>> one of those (or ilk) so I may need some guidance getting it
>> loaded properly when the day arrives. Grant's work looks
>> like a lot of fun!
>>
>> Maybe we should move this new activity to a new thread,
>> appropriately named?
>>
>>
>>
>> On 2/25/2014 1:44 AM, James Moxham wrote:
>>
>>> Message from Grant below (there are some problems
>>> with some of the links in the original site)
>>>
>>> James Moxham
>>>
>>> Hi.
>>> Please can you let the forum know that there is a
>>> live mirror...
>>>
>>> http://zx80.netai.net/grant/Multicomp/index.html
>>>
>>> ...until the main site comes back up.
>>>
>>> Thanks.
>>>
>>> Grant
>>>
>>
>>
>>
>>
>> --
>> You received this message because you are subscribed to the
>> Google Groups "N8VEM" group.
>> To unsubscribe from this group and stop receiving emails from it,
>> send an email to n8vem+unsubscribe-/***@public.gmane.org
>> <mailto:n8vem+unsubscribe-/***@public.gmane.org>.
>> To post to this group, send email to n8vem-/***@public.gmane.org
>> <mailto:n8vem-/***@public.gmane.org>.
>> Visit this group at http://groups.google.com/group/n8vem.
>> For more options, visit https://groups.google.com/groups/opt_out.
>
> --
> You received this message because you are subscribed to the Google
> Groups "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it,
> send an email to n8vem+unsubscribe-/***@public.gmane.org
> <mailto:n8vem%2Bunsubscribe-/***@public.gmane.org>.
> To post to this group, send email to n8vem-/***@public.gmane.org
> <mailto:n8vem-/***@public.gmane.org>.
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.
>
>
> --
> You received this message because you are subscribed to the Google
> Groups "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send
> an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Andrew Bingham
2014-03-01 18:41:42 UTC
Permalink
If you read the Cyclone II DC documentation
(http://www.altera.com/literature/lit-cyc2.jsp), its inputs aren't 100% 5V
tolerant - the inexpensive breakout board regulates it down to 3.3 and 1.8
(or 1.2?) for the FPGA. So I think you still might need level translation
to hook it up to 5V things. It can handle up to Vih = 4.6V so it "might"
work depending on the actual Voh of the TTL device..... But it's not for
sure....

Also there is a library called JTAGWhisperer that allows for programming
JTAG devices using an Arduino. Most Arduinos are 5V devices but I happen
to have a 3.3V one (and there are a few 3.3V models out there now). I
bought one of the Cyclone II breakouts Grant is using and today I'll try
and program it using the Arduino+JTAGWhisperer combination. If that works
I won't have to buy any new hardware for programming....

On Saturday, March 1, 2014 3:17:21 AM UTC-8, picmaster wrote:
>
> Hi James,
>
> About the N8VEM bank switching - that's great idea. It would be perfect if
> the FPGA implementations of N8VEM use the same SW releases and behave the
> same way as the original board, to avoid confusion and fragmentation.
> 5V compatibility - yep, FPGAs will be "aliens in the TTL world" without
> this.
> UART FIFO is 16 bytes, and I can say this is perfectly fine, compared to
> others (there are some automotive ECUs, like NEC V850, with 1 byte FIFO
> where you can even pretend that it doesn't loose all its data traffic :D).
> For the VHDL - please be kind and use generic interfaces to the IP blocks,
> which doesn't expose the FPGA vendor technology, so we can easily implement
> Altera/Xilinx/Other implementations.
>
> And finally, for the schematic entry - in long run this doesn't scale well
> at all. Could be good for the initial take-off (although I never did this
> in the past), it's very important for HDL designer to understand how
> behavioral description works. I personally prefer Verilog for my projects,
> but I won't start religious war for this - I can read somehow VHDL, both
> HDLs can be mixed in the same project, and there are enough nice projects
> out there using VHDL which I don't want to miss.
>
> The only thing which is left as a major concern for implementing our hobby
> logic inside FPGA is that these chips are inherently synchronous, which
> means we can't just put code without clock and expect it to work. The issue
> typically is that even if the LUT can work asynchronously, the LUT output
> is usually registered, and needs a clock. Please tell me if I'm wrong.
>
> Regards,
> picmaster
>
>
> On 3/1/2014 1:04 AM, James Moxham wrote:
>
> Hi Paul,
>
> Sure, no problem making a board.
>
> Grant and I have been brainstorming designs - attached is the latest
> incarnation. Very similar to his except that:
>
> 1) 512k memory and so 3 extra address lines. Initially would just pull
> these low in VHDL, but later it would be great to replicate the N8VEM bank
> switching circuitry.
> 2) Added a touchscreen as an optional extra - will need to write software
> for this. The driver code for this is available in C, so should be possible
> in BDSC etc.
> 3) Added a 5V socket as well as the 5V pin. Build a simple 5V splitter and
> run this board and the FPGA on the same wall wart.
> 4) Added an I2C bus - later will need to write code for this.
> 5) Jumpers to run the keyboard on either 3 or 5V. I think new ones run on
> 3V but not sure about older ones.
> 6) Dual Max3232 chips. Grant is using the RTS line to slow down the PC if
> needed as the UART buffer is only 16 bytes, but he says that can be
> increased in software if needed (eg to 256 bytes so could handle a full
> xmodem packet). The CTS pin isn't needed as the PC can gobble up bytes as
> fast as they are sent back.
>
> Re the cyclone board, the download device is a USB Blaster, and some
> boards come with this included. There are two sockets on the board, I think
> one is for fast downloads to temp memory, and the other is for permanent
> downloads. A search on ebay for "FPGA" sorted on price usually brings up
> these boards. The board is about $17 and the USB Blaster about $11.
>
> I'm a newbie to VHDL as well. However, there is a way in Quartus to
> design using schematics rather than VHDL, and you can use familiar 74xx
> part numbers. Then you can convert to VHDL and get a feel for how things
> translate.
>
> James Moxham
>
>
>
> On Sat, 01 Mar 2014 01:10:23 +1030, Paul Birkel <pbi...-***@public.gmane.org><javascript:>wrote:
>
> I don't have enough experience to provide much constructive criticism,
> but it sure looks purty ;->! Looks like you put in a position for a
> power-pin to the Cyclone board, thank you. Please consider me if/when you
> do a board-run; in the meantime I've ordered a Cyclone II board. Never
> worked with one of those (or ilk) so I may need some guidance getting it
> loaded properly when the day arrives. Grant's work looks like a lot of fun!
>
> Maybe we should move this new activity to a new thread, appropriately
> named?
>
>
>
> On 2/25/2014 1:44 AM, James Moxham wrote:
>
>> Message from Grant below (there are some problems with some of the
>> links in the original site)
>>
>> James Moxham
>>
>> Hi.
>> Please can you let the forum know that there is a live mirror...
>>
>> http://zx80.netai.net/grant/Multicomp/index.html
>>
>> ...until the main site comes back up.
>>
>> Thanks.
>>
>> Grant
>>
>>
>>
>>
>>
> --
> You received this message because you are subscribed to the Google Groups
> "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to n8vem+un...-/***@public.gmane.org <javascript:>.
> To post to this group, send email to n8...-/***@public.gmane.org <javascript:>.
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.
>
>
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Borut
2014-03-04 09:15:37 UTC
Permalink
Andrew, James,

Would it be possible to organize a group order of a support board that
James is building?
Maybe in the same way Andrew is organizing a group order of 6x0x board?

Best regards,
Bo/



On Saturday, March 1, 2014 7:41:42 PM UTC+1, Andrew Bingham wrote:
>
> If you read the Cyclone II DC documentation (
> http://www.altera.com/literature/lit-cyc2.jsp), its inputs aren't 100% 5V
> tolerant - the inexpensive breakout board regulates it down to 3.3 and 1.8
> (or 1.2?) for the FPGA. So I think you still might need level translation
> to hook it up to 5V things. It can handle up to Vih = 4.6V so it "might"
> work depending on the actual Voh of the TTL device..... But it's not for
> sure....
>
> Also there is a library called JTAGWhisperer that allows for programming
> JTAG devices using an Arduino. Most Arduinos are 5V devices but I happen
> to have a 3.3V one (and there are a few 3.3V models out there now). I
> bought one of the Cyclone II breakouts Grant is using and today I'll try
> and program it using the Arduino+JTAGWhisperer combination. If that works
> I won't have to buy any new hardware for programming....
>
> On Saturday, March 1, 2014 3:17:21 AM UTC-8, picmaster wrote:
>>
>> Hi James,
>>
>> About the N8VEM bank switching - that's great idea. It would be perfect
>> if the FPGA implementations of N8VEM use the same SW releases and behave
>> the same way as the original board, to avoid confusion and fragmentation.
>> 5V compatibility - yep, FPGAs will be "aliens in the TTL world" without
>> this.
>> UART FIFO is 16 bytes, and I can say this is perfectly fine, compared to
>> others (there are some automotive ECUs, like NEC V850, with 1 byte FIFO
>> where you can even pretend that it doesn't loose all its data traffic :D).
>> For the VHDL - please be kind and use generic interfaces to the IP
>> blocks, which doesn't expose the FPGA vendor technology, so we can easily
>> implement Altera/Xilinx/Other implementations.
>>
>> And finally, for the schematic entry - in long run this doesn't scale
>> well at all. Could be good for the initial take-off (although I never did
>> this in the past), it's very important for HDL designer to understand how
>> behavioral description works. I personally prefer Verilog for my projects,
>> but I won't start religious war for this - I can read somehow VHDL, both
>> HDLs can be mixed in the same project, and there are enough nice projects
>> out there using VHDL which I don't want to miss.
>>
>> The only thing which is left as a major concern for implementing our
>> hobby logic inside FPGA is that these chips are inherently synchronous,
>> which means we can't just put code without clock and expect it to work. The
>> issue typically is that even if the LUT can work asynchronously, the LUT
>> output is usually registered, and needs a clock. Please tell me if I'm
>> wrong.
>>
>> Regards,
>> picmaster
>>
>>
>> On 3/1/2014 1:04 AM, James Moxham wrote:
>>
>> Hi Paul,
>>
>> Sure, no problem making a board.
>>
>> Grant and I have been brainstorming designs - attached is the latest
>> incarnation. Very similar to his except that:
>>
>> 1) 512k memory and so 3 extra address lines. Initially would just pull
>> these low in VHDL, but later it would be great to replicate the N8VEM bank
>> switching circuitry.
>> 2) Added a touchscreen as an optional extra - will need to write software
>> for this. The driver code for this is available in C, so should be possible
>> in BDSC etc.
>> 3) Added a 5V socket as well as the 5V pin. Build a simple 5V splitter
>> and run this board and the FPGA on the same wall wart.
>> 4) Added an I2C bus - later will need to write code for this.
>> 5) Jumpers to run the keyboard on either 3 or 5V. I think new ones run on
>> 3V but not sure about older ones.
>> 6) Dual Max3232 chips. Grant is using the RTS line to slow down the PC if
>> needed as the UART buffer is only 16 bytes, but he says that can be
>> increased in software if needed (eg to 256 bytes so could handle a full
>> xmodem packet). The CTS pin isn't needed as the PC can gobble up bytes as
>> fast as they are sent back.
>>
>> Re the cyclone board, the download device is a USB Blaster, and some
>> boards come with this included. There are two sockets on the board, I think
>> one is for fast downloads to temp memory, and the other is for permanent
>> downloads. A search on ebay for "FPGA" sorted on price usually brings up
>> these boards. The board is about $17 and the USB Blaster about $11.
>>
>> I'm a newbie to VHDL as well. However, there is a way in Quartus to
>> design using schematics rather than VHDL, and you can use familiar 74xx
>> part numbers. Then you can convert to VHDL and get a feel for how things
>> translate.
>>
>> James Moxham
>>
>>
>>
>> On Sat, 01 Mar 2014 01:10:23 +1030, Paul Birkel <pbi...-***@public.gmane.org>wrote:
>>
>> I don't have enough experience to provide much constructive criticism,
>> but it sure looks purty ;->! Looks like you put in a position for a
>> power-pin to the Cyclone board, thank you. Please consider me if/when you
>> do a board-run; in the meantime I've ordered a Cyclone II board. Never
>> worked with one of those (or ilk) so I may need some guidance getting it
>> loaded properly when the day arrives. Grant's work looks like a lot of fun!
>>
>> Maybe we should move this new activity to a new thread, appropriately
>> named?
>>
>>
>>
>> On 2/25/2014 1:44 AM, James Moxham wrote:
>>
>>> Message from Grant below (there are some problems with some of the
>>> links in the original site)
>>>
>>> James Moxham
>>>
>>> Hi.
>>> Please can you let the forum know that there is a live mirror...
>>>
>>> http://zx80.netai.net/grant/Multicomp/index.html
>>>
>>> ...until the main site comes back up.
>>>
>>> Thanks.
>>>
>>> Grant
>>>
>>>
>>>
>>>
>>>
>> --
>> You received this message because you are subscribed to the Google Groups
>> "N8VEM" group.
>> To unsubscribe from this group and stop receiving emails from it, send an
>> email to n8vem+un...-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>> To post to this group, send email to n8...-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>> Visit this group at http://groups.google.com/group/n8vem.
>> For more options, visit https://groups.google.com/groups/opt_out.
>>
>>
>>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
James Moxham
2014-03-05 04:55:21 UTC
Permalink
I'm getting 10 boards made - order went in 5 days ago. Will be another 3
weeks before they arrive. I use Seeed Studios and mostly the boards I get
made are fine but occasionally they make a mistake (leave off the
component mask, mirror image the holes but not the pads), so if the boards
are fine then I'll send some to those that posted on this thread. I've got
no idea how to use these new fangled FPGA things, but hopefully as a group
we can muddle our way through to some working boards!

Cheers, James

On Tue, 04 Mar 2014 19:45:37 +1030, Borut <bkorosin-***@public.gmane.org> wrote:

> Andrew, James,
>
> Would it be possible to organize a group order of a support board that
> James is building?Maybe in the same way Andrew is organizing a group
> order of 6x0x board?
>
> Best regards,
> Bo/
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Borut
2014-03-05 08:34:21 UTC
Permalink
James,

I would be interested in one of this boards.

Best regards,

Bo/

Dne sreda, 05. marec 2014 05:55:21 UTC+1 je oseba James Moxham (Dr_Acula)
napisala:
>
> I'm getting 10 boards made - order went in 5 days ago. Will be another 3
> weeks before they arrive. I use Seeed Studios and mostly the boards I get
> made are fine but occasionally they make a mistake (leave off the component
> mask, mirror image the holes but not the pads), so if the boards are fine
> then I'll send some to those that posted on this thread. I've got no idea
> how to use these new fangled FPGA things, but hopefully as a group we can
> muddle our way through to some working boards!
>
> Cheers, James
>
> On Tue, 04 Mar 2014 19:45:37 +1030, Borut <bkor...-***@public.gmane.org <javascript:>>
> wrote:
>
> Andrew, James,
>
> Would it be possible to organize a group order of a support board that
> James is building?
> Maybe in the same way Andrew is organizing a group order of 6x0x board?
>
> Best regards,
> Bo/
>
>
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
James Moxham
2014-03-05 08:55:23 UTC
Permalink
Sure, no problem, I can send you one. I'll post on this thread when they
arrive. Cheers, James

On Wed, 05 Mar 2014 19:04:21 +1030, Borut <bkorosin-***@public.gmane.org> wrote:

> James,
> I would be interested in one of this boards.
>
> Best regards,
>
> Bo/

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Max Scane
2014-03-05 21:19:43 UTC
Permalink
Hi James,

I would be interested in experimenting with one of these if you have
sufficient.

Cheers!

Max


On Wed, Mar 5, 2014 at 3:55 PM, James Moxham <moxhamj-CkBdp7X+***@public.gmane.org>wrote:

> I'm getting 10 boards made - order went in 5 days ago. Will be another 3
> weeks before they arrive. I use Seeed Studios and mostly the boards I get
> made are fine but occasionally they make a mistake (leave off the component
> mask, mirror image the holes but not the pads), so if the boards are fine
> then I'll send some to those that posted on this thread. I've got no idea
> how to use these new fangled FPGA things, but hopefully as a group we can
> muddle our way through to some working boards!
>
> Cheers, James
>
> On Tue, 04 Mar 2014 19:45:37 +1030, Borut <bkorosin-***@public.gmane.org> wrote:
>
> Andrew, James,
>
> Would it be possible to organize a group order of a support board that
> James is building?
> Maybe in the same way Andrew is organizing a group order of 6x0x board?
>
> Best regards,
> Bo/
>
>
> --
> You received this message because you are subscribed to the Google Groups
> "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
James Moxham
2014-03-21 07:01:51 UTC
Permalink
Boards have arrived - see attached. Very early stage of testing at the
moment but we have a VGA display.

I have 6 boards left, and these are not fully tested as yet so hacks with
wirewrap wire might be needed. This is a bit tricky limiting boards, but I
have six boards and on my email list of people posting back in early March
I have six names and I really hope I haven't left anyone out. That is Max
Scane, Nikolay, Borut, Andrew Bingham, Paul Birkel and Bob Grieb. No cost.
Send address to moxhamj at internode.on.net

Cheers, James Moxham



On Tue, 25 Feb 2014 16:40:11 +1030, Nikolay Dimitrov <picmaster-***@public.gmane.org>
wrote:

> Hi James,
>
> That's great news! Thanks!
>
> Regards,
> picmaster
>
>
> On 2/25/2014 1:44 AM, James Moxham wrote:
>> Message from Grant below (there are some problems with some of the
>> links in the original site)
>>
>> James Moxham
>>
>> Hi.
>> Please can you let the forum know that there is a live mirror...
>>
>> http://zx80.netai.net/grant/Multicomp/index.html
>>
>> ...until the main site comes back up.
>>
>> Thanks.
>>
>> Grant
>>
>>
>> --You received this message because you are subscribed to the Google
>> Groups "N8VEM" group.
>> To unsubscribe from this group and stop receiving emails from it, send
>> an email to n8vem>>+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>> Visit this group at http://groups.google.com/group/n8vem.
>> For more options, visit https://groups.google.com/groups/opt_out.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham
2014-03-21 07:47:24 UTC
Permalink
Posting a build log here.

1) Added a keyboard.
2) Changed the programming socket from programming to ram, to programming
to eeprom. This video shows how to do this
https://www.youtube.com/watch?v=ZrMe8JS7Ktk the only difference is at the
end where he changes a switch, instead, swap the header socket over.
3) On the photo of the underside of the board, top corner there is a wire
link from the centre of the 5V DC input socket to the PCB. There are lots
of pins on this board, but none of them were 5V.
4) Photo of the top side of the board. There is a solder blob near the
keyboard socket - bridge across either 5V or 3V (but not both!) to supply
the keyboard with power. Older ones need 5V.
5) A mistake on the board I made - there is no room for the DC input
header on the board because it would bump into the one on the FPGA board.
It isn't needed on my board anyway - next design I'll remove it.
6) Screen shot of a Hello World
7) Below is the working demo code for Quartus

Grant's website takes you through steps to copy in blocks of code but I
made lots of errors the first time I tried this, so a working demo makes
things easier.

-- This file is copyright by Grant Searle 2014
-- You are free to use this file in your own projects but must never charge
--for it nor use it without
-- acknowledgement.
-- Please ask permission from Grant Searle before republishing elsewhere.
-- If you use this file or any part of it, please add an acknowledgement to
--myself and
-- a link back to my main web site http://searle.hostei.com/grant/
-- and to the "multicomp" page at
--http://searle.hostei.com/grant/Multicomp/index.html
--
-- Please check on the above web pages to see if there are any updates
--before using this file.
-- If for some reason the page is no longer available, please search for
--"Grant Searle"
-- on the internet to see if I have moved to another web hosting service.
--
-- Grant Searle
-- eMail address available on my main web page link above.

library ieee;
use ieee.std_logic_1164.all;
use IEEE.STD_LOGIC_ARITH.all;
use IEEE.STD_LOGIC_UNSIGNED.all;

entity Microcomputer is
port(
n_reset : in std_logic;
clk : in std_logic;

sramData : inout std_logic_vector(7 downto 0);
sramAddress : out std_logic_vector(15 downto 0);
n_sRamWE : out std_logic;
n_sRamCS : out std_logic;
n_sRamOE : out std_logic;

rxd1 : in std_logic;
txd1 : out std_logic;
rts1 : out std_logic;

rxd2 : in std_logic;
txd2 : out std_logic;
rts2 : out std_logic;

videoSync : out std_logic;
video : out std_logic;

videoR0 : out std_logic;
videoG0 : out std_logic;
videoB0 : out std_logic;
videoR1 : out std_logic;
videoG1 : out std_logic;
videoB1 : out std_logic;
hSync : out std_logic;
vSync : out std_logic;

ps2Clk : inout std_logic;
ps2Data : inout std_logic;

sdCS : out std_logic;
sdMOSI : out std_logic;
sdMISO : in std_logic;
sdSCLK : out std_logic;
driveLED : out std_logic :='1'
);
end Microcomputer;

architecture struct of Microcomputer is

signal n_WR : std_logic;
signal n_RD : std_logic;
signal cpuAddress : std_logic_vector(15 downto 0);
signal cpuDataOut : std_logic_vector(7 downto 0);
signal cpuDataIn : std_logic_vector(7 downto 0);

signal basRomData : std_logic_vector(7 downto 0);
signal internalRam1DataOut : std_logic_vector(7 downto 0);
signal internalRam2DataOut : std_logic_vector(7 downto 0);
signal interface1DataOut : std_logic_vector(7 downto 0);
signal interface2DataOut : std_logic_vector(7 downto 0);
signal sdCardDataOut : std_logic_vector(7 downto 0);

signal n_memWR : std_logic :='1';
signal n_memRD : std_logic :='1';

signal n_ioWR : std_logic :='1';
signal n_ioRD : std_logic :='1';

signal n_MREQ : std_logic :='1';
signal n_IORQ : std_logic :='1';

signal n_int1 : std_logic :='1';
signal n_int2 : std_logic :='1';

signal n_externalRamCS : std_logic :='1';
signal n_internalRam1CS : std_logic :='1';
signal n_internalRam2CS : std_logic :='1';
signal n_basRomCS : std_logic :='1';
signal n_interface1CS : std_logic :='1';
signal n_interface2CS : std_logic :='1';
signal n_sdCardCS : std_logic :='1';

signal serialClkCount : std_logic_vector(15 downto 0);
signal cpuClkCount : std_logic_vector(5 downto 0);
signal sdClkCount : std_logic_vector(5 downto 0);
signal cpuClock : std_logic;
signal serialClock : std_logic;
signal sdClock : std_logic;

begin
--
-- CPU CHOICE GOES HERE
cpu1 : entity work.t80s
generic map(mode => 1, t2write => 1, iowait => 0)
port map(
reset_n => n_reset,
clk_n => cpuClock,
wait_n => '1',
int_n => '1',
nmi_n => '1',
busrq_n => '1',
mreq_n => n_MREQ,
iorq_n => n_IORQ,
rd_n => n_RD,
wr_n => n_WR,
a => cpuAddress,
di => cpuDataIn,
do => cpuDataOut);
--
-- ROM GOES HERE
rom1 : entity work.Z80_BASIC_ROM -- 8KB BASIC
port map(
address => cpuAddress(12 downto 0),
clock => clk,
q => basRomData
);
--
-- RAM GOES HERE
ram1: entity work.InternalRam2K
port map
(
address => cpuAddress(10 downto 0),
clock => clk,
data => cpuDataOut,
wren => not(n_memWR or n_internalRam1CS),
q => internalRam1DataOut
);
-- INPUT/OUTPUT DEVICES GO HERE
io1 : entity work.SBCTextDisplayRGB
generic map(
HORIZ_CHARS => 40,
CLOCKS_PER_PIXEL => 4
)
port map (
n_reset => n_reset,
clk => clk,

-- RGB video signals
hSync => hSync,
vSync => vSync,
videoR0 => videoR0,
videoR1 => videoR1,
videoG0 => videoG0,
videoG1 => videoG1,
videoB0 => videoB0,
videoB1 => videoB1,

-- Monochrome video signals (when using TV timings only)
sync => videoSync,
video => video,

n_wr => n_interface1CS or n_ioWR,
n_rd => n_interface1CS or n_ioRD,
n_int => n_int1,
regSel => cpuAddress(0),
dataIn => cpuDataOut,
dataOut => interface1DataOut,
ps2Clk => ps2Clk,
ps2Data => ps2Data
);
--
-- MEMORY READ/WRITE LOGIC GOES HERE
n_ioWR <= n_WR or n_IORQ;
n_memWR <= n_WR or n_MREQ;
n_ioRD <= n_RD or n_IORQ;
n_memRD <= n_RD or n_MREQ;
--
-- CHIP SELECTS GO HERE

n_basRomCS <= '0' when cpuAddress(15 downto 13) = "000" else '1'; --8K at
bottom of memory
n_interface1CS <= '0' when cpuAddress(7 downto 1) = "1000000" and
(n_ioWR='0' or n_ioRD = '0') else '1'; -- 2 Bytes $80-$81
n_interface2CS <= '0' when cpuAddress(7 downto 1) = "1000001" and
(n_ioWR='0' or n_ioRD = '0') else '1'; -- 2 Bytes $82-$83
n_sdCardCS <= '0' when cpuAddress(7 downto 3) = "10001" and (n_ioWR='0' or
n_ioRD = '0') else '1'; -- 8 Bytes $88-$8F
n_internalRam1CS <= '0' when cpuAddress(15 downto 11) = "00100" else '1';
--
-- BUS ISOLATION GOES HERE
cpuDataIn <=
interface1DataOut when n_interface1CS = '0' else
interface2DataOut when n_interface2CS = '0' else
sdCardDataOut when n_sdCardCS = '0' else
basRomData when n_basRomCS = '0' else
internalRam1DataOut when n_internalRam1CS= '0' else
sramData when n_externalRamCS= '0' else
x"FF";
--
-- SYSTEM CLOCKS GO HERE
serialClock <= serialClkCount(15);
process (clk)
begin
if rising_edge(clk) then

if cpuClkCount < 4 then -- 4 = 10MHz, 3 = 12.5MHz, 2=16.6MHz, 1=25MHz
cpuClkCount <= cpuClkCount + 1;
else
cpuClkCount <= (others=>'0');
end if;
if cpuClkCount < 2 then -- 2 when 10MHz, 2 when 12.5MHz, 2 when 16.6MHz, 1
when 25MHz
cpuClock <= '0';
else
cpuClock <= '1';
end if;

if sdClkCount < 49 then -- 1MHz
sdClkCount <= sdClkCount + 1;
else
sdClkCount <= (others=>'0');
end if;
if sdClkCount < 25 then
sdClock <= '0';
else
sdClock <= '1';
end if;

-- Serial clock DDS
-- 50MHz master input clock:
-- Baud Increment
-- 115200 2416
-- 38400 805
-- 19200 403
-- 9600 201
-- 4800 101
-- 2400 50
serialClkCount <= serialClkCount + 2416;
end if;
end process;
end;

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
oscarv
2014-03-21 09:46:59 UTC
Permalink
James,

Nice! I was too late in picking up on this thread, so I wired up Grant's
Multicomp the old-fashioned way, see picture attached.

I did, however, copy over the "N8VEM CP/M Demo Disk Image" for the FPGA
machine. So the link below gives a preformatted SD image with most all CP/M
software on it:
http://obsolescence.wix.com/obsolescence#!multicomp-fpga-cpm-demo-disk/c1fom

There's a lot of interesting things to do with this platform (integrate an
MMU, port MP/M, OS/9, Cubix...), I hope it gets an active user base. From
my perspective, it's an ideal way for homebrewers to learn VHDL from a
running start.

Regards,

Oscar.

BTW - Here is a write-up of the parts I used:
http://obsolescenceguaranteed.blogspot.ch/2014/03/retro-fpga-grant-searles-multicomp.html




--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham
2014-03-21 12:27:33 UTC
Permalink
Oscar - Wow - you are way ahead of us all here!

Tonight I soldered up the RS232 parts and the SD card and the SRAM. I'm
following Grant's circuit except that I'm using a 512k sram so that needs
a few extra address lines. Not needed for the moment but later I have an
idea of replicating the N8VEM bank switching circuitry which will allow a
ramdisk using existing N8VEM software.

Oscar - any chance you could post your VHDL code? I'm keen to replicate
what you have done :)

James Moxham




On Fri, 21 Mar 2014 20:16:59 +1030, oscarv <vermeulen.oscar-***@public.gmane.org>
wrote:

> James,
>
> Nice! I was too late in picking up on this thread, so I wired up Grant's
> Multicomp the old-fashioned way, see picture attached.
>
> I did, however, copy over the "N8VEM CP/M Demo Disk Image" for the FPGA
> machine. So the link below gives a preformatted SD image >with most all
> CP/M software on it:
> http://obsolescence.wix.com/obsolescence#!multicomp-fpga-cpm-demo-disk/c1fom
>
> There's a lot of interesting things to do with this platform (integrate
> an MMU, port MP/M, OS/9, Cubix...), I hope it gets an active user base.
> >From my perspective, it's an ideal way for homebrewers to learn VHDL
> from a running start.
>
> Regards,
>
> Oscar.
>
> BTW - Here is a write-up of the parts I used:
> http://obsolescenceguaranteed.blogspot.ch/2014/03/retro-fpga-grant-searles-multicomp.html

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
oscarv
2014-03-21 12:44:03 UTC
Permalink
James,

On Friday, March 21, 2014 1:27:33 PM UTC+1, James Moxham (Dr_Acula) wrote:
>
> Oscar - Wow - you are way ahead of us all here!
>

Not exactly - compare the mess o' wires to your clean board :)


> Tonight I soldered up the RS232 parts and the SD card and the SRAM. I'm
> following Grant's circuit except that I'm using a 512k sram so that needs a
> few extra address lines. Not needed for the moment but later I have an idea
> of replicating the N8VEM bank switching circuitry which will allow a
> ramdisk using existing N8VEM software.
>

That's what I thought of too. The 512K SRam (in the mail) is also 32 pins
so I can upgrade without the help of a soldering iron.

In fact, making the Multicomp N8VEM compatible is a nice VHDL exercise
probably, not too hard from the base that exists now. I'm suffering from
too many possible extension projects in the mind and knowing I will need to
focus on one to get anything actually done... You know, from the running
base that exists now it is not *that* hard to replicate some S-100 boards
and run (personal obsession) Cromix for instance. Or replicate the MMU from
the new N8VEM 6809 board. Or, or, or...

Oscar - any chance you could post your VHDL code? I'm keen to replicate
> what you have done :)
>

I'll post when I get home tonight - but it's just a copy & paste from
Grant's web site mind you.

Regards,

Oscar.

>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham
2014-03-22 00:05:46 UTC
Permalink
Hi Oscar,

Thanks for sending the VHDL code.

I'm on the very steep part of the learning curve for VHDL (in other words
I have no idea what I am doing!) and I can't seem to get anything on the
screen with that code. There is no SD card in the socket, but I was hoping
for at least something on the screen.

(addit - see below, I think I worked it out, Oscar does not have a display
and I think is debugging via the serial port and a terminal program)

So I'm back using Grant's very simple working demo using internal memory.
This was the code I posted yesterday.

I never managed to get anything working by following the steps on Grant's
webpages, but when I sent him my code after following his steps he found a
number of errors. So even though his website takes things through step by
step, maybe it needs to be even simpler.

Perhaps this might be useful to others too, but what I would like to do is
start off with the very simplest demo and then gradually add components.

So Grant's demo code will display a message on the screen in a large font.

Adding a keyboard - two 10k resistors and a PS2 socket - that works

Next things to add to the code:
1) Serial port
2) External memory
3) SD card.
4) A CP/M emulation running from the SD card.

Oscar's code has some CP/M inserts near the beginning of the code - I'll
leave those for the moment as there are 1-2 above that need fixing first.
So we are down to CPU CHOICE GOES HERE and that is the same in Grant and
Oscar's code.

Next is the ROM GOES HERE section and that is the same except for one line
that defines the rom - Oscar has this
rom1 : entity work.Z80_CPM_BASIC_ROM -- 8KB BASIC and CP/M boot
and Grant has this
rom1 : entity work.Z80_BASIC_ROM -- 8KB BASIC
so that makes sense.

Next is RAM GOES HERE
Grant's code is using internal ram
-- RAM GOES HERE
ram1: entity work.InternalRam2K
port map
(
address => cpuAddress(10 downto 0),
clock => clk,
data => cpuDataOut,
wren => not(n_memWR or n_internalRam1CS),
q => internalRam1DataOut
);

and Oscar is using external ram


sramAddress(15 downto 0) <= cpuAddress(15 downto 0);
sramData <= cpuDataOut when n_memWR='0' else (others => 'Z');
n_sRamWE <= n_memWR or n_externalRamCS;
n_sRamOE <= n_memRD or n_externalRamCS;
n_sRamCS <= n_externalRamCS;

and last night I tried dropping in that external ram code but the compiler
produced some errors, so I suspect there may be some code/definitions
somewhere else that are also needed when you add external ram. I see in
the CP/M section there is some code to disable the rom on a reset so that
might be relevant.

Next section is -- INPUT/OUTPUT DEVICES GO HERE

This part is a bit confusing. Oscar has
io1 : entity work.bufferedUART
... code
io2 : entity work.bufferedUART
... code
sd1 : entity work.sd_controller
... code

and that makes sense - you add in uarts, and you name them io1, io2 etc.

But Grant's code has
io1 : entity work.SBCTextDisplayRGB
generic map(
HORIZ_CHARS => 40,
CLOCKS_PER_PIXEL => 4
)

and then a whole lot of video definitions

And looking at Oscar's code, there are no video definitions anywhere. So I
think what Oscar may be doing is debugging with a serial port.

I tried adding a serial port after the video driver, but the compiler
didn't like that. Grant talks about i/o in his website but I need to read
it again.

There are pros and cons to a display vs a serial system. Maybe we need
both?

I'll keep experimenting...


On Fri, 21 Mar 2014 23:14:03 +1030, oscarv <vermeulen.oscar-***@public.gmane.org>
wrote:

> James,
>
> On Friday, March 21, 2014 1:27:33 PM UTC+1, James Moxham (Dr_Acula)
> wrote:
>> Oscar - Wow - you are way ahead of us all here!
>
> Not exactly - compare the mess o' wires to your clean board :)
>
>> Tonight I soldered up the RS232 parts and the SD card and the SRAM. I'm
>> following Grant's circuit except that I'm using a 512k sram >>so that
>> needs a few extra address lines. Not needed for the moment but later I
>> have an idea of replicating the N8VEM bank switching >>circuitry which
>> will allow a ramdisk using existing N8VEM software.
>
> That's what I thought of too. The 512K SRam (in the mail) is also 32
> pins so I can upgrade without the help of a soldering iron.
>
> In fact, making the Multicomp N8VEM compatible is a nice VHDL exercise
> probably, not too hard from the base that exists now. I'm >suffering
> from too many possible extension projects in the mind and knowing I will
> need to focus on one to get anything actually done... >You know, from
> the running base that exists now it is not that hard to replicate some
> S-100 boards and run (personal obsession) Cromix >for instance. Or
> replicate the MMU from the new N8VEM 6809 board. Or, or, or...
>
>> Oscar - any chance you could post your VHDL code? I'm keen to replicate
>> what you have done :)
>
> I'll post when I get home tonight - but it's just a copy & paste from
> Grant's web site mind you.
>
> Regards,
>
> Oscar.
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
oscarv
2014-03-22 00:24:19 UTC
Permalink
James,

You are right, lacking a PS/2 connector to rig up the VGA/keyboard, I just
use the RS-232 terminal.

On Saturday, March 22, 2014 1:05:46 AM UTC+1, James Moxham (Dr_Acula) wrote:
>> I'm on the very steep part of the learning curve for VHDL (in other
words I have no idea what I am doing!)

Ah. We're on the very same spot on the curve then.

Where you refer to "Oscar's code", actually, it's the code from Grant's
pages. You suspect a presence of intelligence where it is not to be found
alas... I mastered no more than CTRL-C and CTRL-V. Ashamed of my lack of
creativity, though, I then added some comment lines...

>> I'll keep experimenting...

So just to be precise - I diligently copied/pasted from Grants 2 web pages
without any changes. Indeed, I use serial instead of VGA.
There's a few code changes that he mentions in the text of the pages, not
just in copy/paste code snippets, I think, though I forgot which ones. But
if you replace my io1 UART snippets by the alternative io1 VGA/PS2 code -
which acts the same as the io1 UART, that *should* be all that needs doing.

Once I receive my PS/2 connector from the other side of the planet, I'll
try VGA/PS2 as well!

Regards,

Oscar.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham
2014-03-22 00:28:34 UTC
Permalink
Ah good, we shall muddle along together then :)

Ok, I got the serial port working. I'm saving these as simple text files
and then just copy and paste them into quartus. For me at this stage, it
is earlier that creating a new project each time.

So this is a simple piece of demo code to test the serial port. No display
or keyboard. Uses 112500 baud on any simple terminal program and a serial
to USB adapter cable.

-- This file is copyright by Grant Searle 2014
-- You are free to use this file in your own projects but must never charge
--for it nor use it without
-- acknowledgement.
-- Please ask permission from Grant Searle before republishing elsewhere.
-- If you use this file or any part of it, please add an acknowledgement to
--myself and
-- a link back to my main web site http://searle.hostei.com/grant/
-- and to the "multicomp" page at
--http://searle.hostei.com/grant/Multicomp/index.html
--
-- Please check on the above web pages to see if there are any updates
--before using this file.
-- If for some reason the page is no longer available, please search for
--"Grant Searle"
-- on the internet to see if I have moved to another web hosting service.
--
-- Grant Searle
-- eMail address available on my main web page link above.

library ieee;
use ieee.std_logic_1164.all;
use IEEE.STD_LOGIC_ARITH.all;
use IEEE.STD_LOGIC_UNSIGNED.all;

entity Microcomputer is
port(
n_reset : in std_logic;
clk : in std_logic;

sramData : inout std_logic_vector(7 downto 0);
sramAddress : out std_logic_vector(15 downto 0);
n_sRamWE : out std_logic;
n_sRamCS : out std_logic;
n_sRamOE : out std_logic;

rxd1 : in std_logic;
txd1 : out std_logic;
rts1 : out std_logic;

rxd2 : in std_logic;
txd2 : out std_logic;
rts2 : out std_logic;

videoSync : out std_logic;
video : out std_logic;

videoR0 : out std_logic;
videoG0 : out std_logic;
videoB0 : out std_logic;
videoR1 : out std_logic;
videoG1 : out std_logic;
videoB1 : out std_logic;
hSync : out std_logic;
vSync : out std_logic;

ps2Clk : inout std_logic;
ps2Data : inout std_logic;

sdCS : out std_logic;
sdMOSI : out std_logic;
sdMISO : in std_logic;
sdSCLK : out std_logic;
driveLED : out std_logic :='1'
);
end Microcomputer;

architecture struct of Microcomputer is

signal n_WR : std_logic;
signal n_RD : std_logic;
signal cpuAddress : std_logic_vector(15 downto 0);
signal cpuDataOut : std_logic_vector(7 downto 0);
signal cpuDataIn : std_logic_vector(7 downto 0);

signal basRomData : std_logic_vector(7 downto 0);
signal internalRam1DataOut : std_logic_vector(7 downto 0);
signal internalRam2DataOut : std_logic_vector(7 downto 0);
signal interface1DataOut : std_logic_vector(7 downto 0);
signal interface2DataOut : std_logic_vector(7 downto 0);
signal sdCardDataOut : std_logic_vector(7 downto 0);

signal n_memWR : std_logic :='1';
signal n_memRD : std_logic :='1';

signal n_ioWR : std_logic :='1';
signal n_ioRD : std_logic :='1';

signal n_MREQ : std_logic :='1';
signal n_IORQ : std_logic :='1';

signal n_int1 : std_logic :='1';
signal n_int2 : std_logic :='1';

signal n_externalRamCS : std_logic :='1';
signal n_internalRam1CS : std_logic :='1';
signal n_internalRam2CS : std_logic :='1';
signal n_basRomCS : std_logic :='1';
signal n_interface1CS : std_logic :='1';
signal n_interface2CS : std_logic :='1';
signal n_sdCardCS : std_logic :='1';

signal serialClkCount : std_logic_vector(15 downto 0);
signal cpuClkCount : std_logic_vector(5 downto 0);
signal sdClkCount : std_logic_vector(5 downto 0);
signal cpuClock : std_logic;
signal serialClock : std_logic;
signal sdClock : std_logic;

begin
--
-- CPU CHOICE GOES HERE
cpu1 : entity work.t80s
generic map(mode => 1, t2write => 1, iowait => 0)
port map(
reset_n => n_reset,
clk_n => cpuClock,
wait_n => '1',
int_n => '1',
nmi_n => '1',
busrq_n => '1',
mreq_n => n_MREQ,
iorq_n => n_IORQ,
rd_n => n_RD,
wr_n => n_WR,
a => cpuAddress,
di => cpuDataIn,
do => cpuDataOut);
--
-- ROM GOES HERE
rom1 : entity work.Z80_BASIC_ROM -- 8KB BASIC
port map(
address => cpuAddress(12 downto 0),
clock => clk,
q => basRomData
);
--
-- RAM GOES HERE
ram1: entity work.InternalRam2K
port map
(
address => cpuAddress(10 downto 0),
clock => clk,
data => cpuDataOut,
wren => not(n_memWR or n_internalRam1CS),
q => internalRam1DataOut
);
-- INPUT/OUTPUT DEVICES GO HERE
io1 : entity work.bufferedUART
port map(
clk => clk,
n_wr => n_interface1CS or n_ioWR,
n_rd => n_interface1CS or n_ioRD,
n_int => n_int1,
regSel => cpuAddress(0),
dataIn => cpuDataOut,
dataOut => interface1DataOut,
rxClock => serialClock,
txClock => serialClock,
rxd => rxd1,
txd => txd1,
n_cts => '0',
n_dcd => '0',
n_rts => rts1
);
--
-- MEMORY READ/WRITE LOGIC GOES HERE
n_ioWR <= n_WR or n_IORQ;
n_memWR <= n_WR or n_MREQ;
n_ioRD <= n_RD or n_IORQ;
n_memRD <= n_RD or n_MREQ;
--
-- CHIP SELECTS GO HERE

n_basRomCS <= '0' when cpuAddress(15 downto 13) = "000" else '1'; --8K at
bottom of memory
n_interface1CS <= '0' when cpuAddress(7 downto 1) = "1000000" and
(n_ioWR='0' or n_ioRD = '0') else '1'; -- 2 Bytes $80-$81
n_interface2CS <= '0' when cpuAddress(7 downto 1) = "1000001" and
(n_ioWR='0' or n_ioRD = '0') else '1'; -- 2 Bytes $82-$83
n_sdCardCS <= '0' when cpuAddress(7 downto 3) = "10001" and (n_ioWR='0' or
n_ioRD = '0') else '1'; -- 8 Bytes $88-$8F
n_internalRam1CS <= '0' when cpuAddress(15 downto 11) = "00100" else '1';
--
-- BUS ISOLATION GOES HERE
cpuDataIn <=
interface1DataOut when n_interface1CS = '0' else
interface2DataOut when n_interface2CS = '0' else
sdCardDataOut when n_sdCardCS = '0' else
basRomData when n_basRomCS = '0' else
internalRam1DataOut when n_internalRam1CS= '0' else
sramData when n_externalRamCS= '0' else
x"FF";
--
-- SYSTEM CLOCKS GO HERE
serialClock <= serialClkCount(15);
process (clk)
begin
if rising_edge(clk) then

if cpuClkCount < 4 then -- 4 = 10MHz, 3 = 12.5MHz, 2=16.6MHz, 1=25MHz
cpuClkCount <= cpuClkCount + 1;
else
cpuClkCount <= (others=>'0');
end if;
if cpuClkCount < 2 then -- 2 when 10MHz, 2 when 12.5MHz, 2 when 16.6MHz, 1
when 25MHz
cpuClock <= '0';
else
cpuClock <= '1';
end if;

if sdClkCount < 49 then -- 1MHz
sdClkCount <= sdClkCount + 1;
else
sdClkCount <= (others=>'0');
end if;
if sdClkCount < 25 then
sdClock <= '0';
else
sdClock <= '1';
end if;

-- Serial clock DDS
-- 50MHz master input clock:
-- Baud Increment
-- 115200 2416
-- 38400 805
-- 19200 403
-- 9600 201
-- 4800 101
-- 2400 50
serialClkCount <= serialClkCount + 2416;
end if;
end process;
end;





On Sat, 22 Mar 2014 10:54:19 +1030, oscarv <vermeulen.oscar-***@public.gmane.org>
wrote:

> James,
>
> You are right, lacking a PS/2 connector to rig up the VGA/keyboard, I
> just use the RS-232 terminal.
>
> On Saturday, March 22, 2014 1:05:46 AM UTC+1, James Moxham (Dr_Acula)
> wrote:
>>> I'm on the very steep part of the learning curve for VHDL (in other
>>> words I have no idea what I am doing!)
>
> Ah. We're on the very same spot on the curve then.
> Where you refer to "Oscar's code", actually, it's the code from Grant's
> pages. You suspect a presence of intelligence where it is not to be
> >found alas... I mastered no more than CTRL-C and CTRL-V. Ashamed of my
> lack of creativity, though, I then added some comment >lines...
>>> I'll keep experimenting...
>
> So just to be precise - I diligently copied/pasted from Grants 2 web
> pages without any changes. Indeed, I use serial instead of VGA.There's a
> few code changes that he mentions in the text of the pages, not just in
> copy/paste code snippets, I think, though I forgot >which ones. But if
> you replace my io1 UART snippets by the alternative io1 VGA/PS2 code -
> which acts the same as the io1 UART, that >should be all that needs
> doing.
>
> Once I receive my PS/2 connector from the other side of the planet, I'll
> try VGA/PS2 as well!
> Regards,
>
> Oscar.
>
> --

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham
2014-03-22 00:34:48 UTC
Permalink
Oops, spelling error - easier not earlier. And 115200 baud.

Next thing to test out is the memory chip.

I may need some help with the VHDL code as this is different to Grant's
layout.

He is using 64K of a 128K chip with A0-A15 and he has tied A16 to ground
with a wire.

I have a 512K chip and later I'd like to use all that memory. So I have:

A16 = FPGA pin 17
A17 = FPGA pin 18
A19 = FPGA pin 22

So somewhere in the code would need to define these as Low.

James

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham
2014-03-22 00:49:10 UTC
Permalink
And in writing that down, I have found the first error on the board.

FPGA pin 17 is reserved for the 50Mhz clock input and I have it connected
to the ram A16.

Probably explains why CP/M won't boot!

So that is going to require a cut and a new link on the board. Fortunately
this will be easy as it is pin 2 on the memory chip and it happens to come
out to a via just opposite the notch of the ram chip. So that can be
drilled out easily.

I will ask Grant what pins he suggests for A16 to A18.

James



On Sat, 22 Mar 2014 11:04:48 +1030, James Moxham
<moxhamj-CkBdp7X+***@public.gmane.org> wrote:

> Oops, spelling error - easier not earlier. And 115200 baud.
>
> Next thing to test out is the memory chip.
>
> I may need some help with the VHDL code as this is different to Grant's
> layout.
> He is using 64K of a 128K chip with A0-A15 and he has tied A16 to ground
> with a wire.
>
> I have a 512K chip and later I'd like to use all that memory. So I have:
>
> A16 = FPGA pin 17
> A17 = FPGA pin 18
> A19 = FPGA pin 22
>
> So somewhere in the code would need to define these as Low.
> James

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
Alan Hightower
2014-03-22 02:17:43 UTC
Permalink
FPGA's really don't have reserved pins except for JTAG and serial
programming interfaces. Even if a pin is designated as a high speed edge
input to the clock tree or a PLL, you can still route it in on any other
pin. Just just take a propagation delay hit. That's the nice thing about
programmable logic. You can make boards level changes with a text editor
and not a soldering iron.

-Alan

On 2014-03-21 20:49, James Moxham wrote:

> And in writing that down, I have found the first error on the board.
>
> FPGA pin 17 is reserved for the 50Mhz clock input and I have it connected to the ram A16.
>
> Probably explains why CP/M won't boot!
>
> So that is going to require a cut and a new link on the board. Fortunately this will be easy as it is pin 2 on the memory chip and it happens to come out to a via just opposite the notch of the ram chip. So that can be drilled out easily.
>
> I will ask Grant what pins he suggests for A16 to A18.
>
> James
>
> On Sat, 22 Mar 2014 11:04:48 +1030, James Moxham <moxhamj-CkBdp7X+***@public.gmane.org> wrote:
>
>> Oops, spelling error - easier not earlier. And 115200 baud.
>>
>> Next thing to test out is the memory chip.
>>
>> I may need some help with the VHDL code as this is different to Grant's layout.
>>
>> He is using 64K of a 128K chip with A0-A15 and he has tied A16 to ground with a wire.
>>
>> I have a 512K chip and later I'd like to use all that memory. So I have:
>>
>> A16 = FPGA pin 17
>> A17 = FPGA pin 18
>> A19 = FPGA pin 22
>>
>> So somewhere in the code would need to define these as Low.
>>
>> James
>
> --
> You received this message because you are subscribed to the Google Groups "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem [1].
> For more options, visit https://groups.google.com/d/optout [2].


Links:
------
[1] http://groups.google.com/group/n8vem
[2] https://groups.google.com/d/optout

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham
2014-03-22 07:58:58 UTC
Permalink
Good point Alan.

I don't think I'd ever be able to solder a FPGA, so the next best thing is
to use a presoldered board and the one Grant used has several pins that
are fixed - three leds, one pushbutton and the clock.

I'm still working on the sram. It is a bit tricky not being sure if it is
a hardware or a software problem. I ended up cutting the three tracks
A16-A18 on the board and pulling them low. But it still outputs garbage
characters on the screen (occasionally one sees what resembles a signon
message for a brief moment).

So I'm not sure where to take this next, and I'm not sure if there is a
mistake in my schematic and I am also not sure about sending out boards
that don't work.

I've done about 20 compiles on quartus and tried to follow Grant's
instructions step by step.

I'll ask Grant if he has a demo program that does VGA display, keyboard
and sram.

James


On Sat, 22 Mar 2014 12:47:43 +1030, Alan Hightower <alan-***@public.gmane.org>
wrote:

>
>
> FPGA's really don't have reserved pins except for JTAG and serial
> programming interfaces. Even if a pin is >designated as a high speed
> edge input to the clock tree or a PLL, you can still route it in on any
> other pin. > Just just take a propagation delay hit. That's the nice
> thing about programmable logic. You can make >boards level changes with
> a text editor and not a soldering iron.
>
>
> -Alan
>
>
> On 2014-03-21 20:49, James Moxham wrote:
>> And in writing that down, I have found the first error on the board.
>>FPGA pin 17 is reserved for the 50Mhz clock input and I have it
>> connected to the ram A16.
>>Probably explains why CP/M won't boot!
>>So that is going to require a cut and a new link on the board.
>> Fortunately this will be easy as it is >>pin 2 on the memory chip and
>> it happens to come out to a via just opposite the notch of the ram
>> >>chip. So that can be drilled out easily.
>>I will ask Grant what pins he suggests for A16 to A18.
>>James
>>On Sat, 22 Mar 2014 11:04:48 +1030, James Moxham
>> <moxhamj-CkBdp7X+***@public.gmane.org> wrote:
>>
>>> Oops, spelling error - easier not earlier. And 115200 baud.
>>>Next thing to test out is the memory chip.
>>>I may need some help with the VHDL code as this is different to
>>> Grant's layout.He is using 64K of a 128K chip with A0-A15 and he has
>>> tied A16 to ground with a wire.
>>>I have a 512K chip and later I'd like to use all that memory. So I
>>> have:
>>>A16 = FPGA pin 17
>>> A17 = FPGA pin 18
>>> A19 = FPGA pin 22
>>>So somewhere in the code would need to define these as Low.James
>>
>>
>>
>>
>>
>> --You received this message because you are subscribed to the Google
>> Groups "N8VEM" group.
>> To unsubscribe from this group and stop receiving emails from it, send
>> an email to n8vem>>+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
>> Visit this group at http://groups.google.com/group/n8vem.
>> For more options, visit https://groups.google.com/d/optout.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
oscarv
2014-03-22 08:22:25 UTC
Permalink
James,

FWIF - I got garbage onscreen because I made a wiring mistake with the RAM.
Even with that fixed, initially I still got garbage on the screen when I
used Teraterm. For some reason, that terminal program did not like the
115200 baud rate. Then tried puTTY and all was fine.

Regards,

Oscar.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
Max Scane
2014-03-22 08:20:43 UTC
Permalink
Hi James,

Where did you buy your FPGA board? All the ones I have seen on e-bay have the pins around the other way.

Cheers!

Max

Sent from my iPhone

> On 22 Mar 2014, at 11:49 am, "James Moxham" <moxhamj-CkBdp7X+***@public.gmane.org> wrote:
>
> And in writing that down, I have found the first error on the board.
>
> FPGA pin 17 is reserved for the 50Mhz clock input and I have it connected to the ram A16.
>
> Probably explains why CP/M won't boot!
>
> So that is going to require a cut and a new link on the board. Fortunately this will be easy as it is pin 2 on the memory chip and it happens to come out to a via just opposite the notch of the ram chip. So that can be drilled out easily.
>
> I will ask Grant what pins he suggests for A16 to A18.
>
> James
>
>
>
> On Sat, 22 Mar 2014 11:04:48 +1030, James Moxham <moxhamj-CkBdp7X+***@public.gmane.org> wrote:
>
> Oops, spelling error - easier not earlier. And 115200 baud.
>
> Next thing to test out is the memory chip.
>
> I may need some help with the VHDL code as this is different to Grant's layout.
>
> He is using 64K of a 128K chip with A0-A15 and he has tied A16 to ground with a wire.
>
> I have a 512K chip and later I'd like to use all that memory. So I have:
>
> A16 = FPGA pin 17
> A17 = FPGA pin 18
> A19 = FPGA pin 22
>
> So somewhere in the code would need to define these as Low.
>
> James
>
>
>
>
> --
> You received this message because you are subscribed to the Google Groups "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/d/optout.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham (Dr_Acula)
2014-03-23 00:43:36 UTC
Permalink
Hi Max,

Boards like this one
http://www.ebay.com.au/itm/1pc-Mini-System-Development-Board-ALTERA-FPGA-CycloneII-EP2C5T144-Learning-Board-/400630255386?pt=AU_Hardware&hash=item5d476c8f1a

Search ebay for FPGA, and sort on price and these ones come up around the
$20 mark.

And well spotted the pins are round the other way - the board is flipped
upside down. I did this so it would fit into sockets in the board, but
thinking about this more, it may be better to put the FPGA underneath the
main PCB and put it in the right way rather than flipped upside down. Then
you could see the diagnostic leds. Would maybe need some taller mounting
posts than the 10mm ones I am using. I might draw up a board for that -
maybe the next batch could be done this way.

@Oscar, yes, some terminal programs can't handle 115200. I found that
too! With your program, if you take your SD card out and reboot, do you get
something on the terminal? just a signon message and then hanging would be
fine for debugging purposes. If so, I could use your code as a test for the
sram.

Cheers, James

On Saturday, 22 March 2014 18:50:43 UTC+10:30, Max Scane wrote:

> Hi James,
>
> Where did you buy your FPGA board? All the ones I have seen on e-bay have
> the pins around the other way.
>
> Cheers!
>
> Max
>
>
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham
2014-03-23 11:32:17 UTC
Permalink
Just an update re this project. I am completely stuck with getting the
sram working. I have cut tracks, added wire links, tested with a logic
probe, tried multiple program downloads and swapping ram chips out of
working circuits. I did discover that I have swapped pin 17 and 18 on the
board, but they don't matter as I have cut the tracks to both.

All I get is garbage out.

So this is tricky. I don't really want to send out boards that don't work.
And I can't design new boards if I don't know the fault on the current
board.

I feel I may be heading back to debugging using a method I used on the
very first N8VEM project - toggle one clock pulse, check all the pin
levels, toggle again, and watch the first few bytes of a program go
through. I'll need to ask Grant how to do that though.

Sorry this is taking so long.

James

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham
2014-03-24 23:45:14 UTC
Permalink
Deep inside the code at the moment trying to work out why the ram chip
doesn't work.

Grant's computer is a bit different to the N8VEM for input and output.

So - in Grant's files, in the ROM subdirectory is a file called nasmini.asm

This is the bootloader for the basic rom. I'm copying this to a new
folder, compiling with TASM, using Hex Edit to produce an Intel hex file,
then copying this hex file back into the ROM subdirectory and renaming it
BASIC.HEX

The real BASIC.HEX has been renamed as BASICOLD.HEX for the moment.

This means that Grant's Quartus code compiles as it is with no
modifications, as it includes a routine to include the file BASIC.HEX as
the ROM image.

So now it is a matter of editing the assembly code to produce some debug
programs.

First step is to remove all PUSH and POP instructions as these are using a
stack, and the stack needs ram to work, and I don't have working ram. I've
done this in the code below in the TXA: routine.

This compiles and runs.

Next will be to write a routine to read and write to ram...


James


;==================================================================================
; Contents of this file are copyright Grant Searle
;
; You have permission to use this for NON COMMERCIAL USE ONLY
; If you wish to use it elsewhere, please include an acknowledgement to
myself.
;
; http://searle.hostei.com/grant/index.html
;
; eMail: home.micros01-***@public.gmane.org
;
; If the above don't work, please perform an Internet search to see if I
have
; updated the web page hosting service.
;
;==================================================================================

; Minimum 6850 ACIA serial I/O to run modified NASCOM Basic 4.7


RTS_HIGH .EQU 0D5H
RTS_LOW .EQU 095H

basicStarted .EQU $2000
TEMPSTACK .EQU $200F

CR .EQU 0DH
LF .EQU 0AH
CS .EQU 0CH ; Clear screen

.ORG $0000
;------------------------------------------------------------------------------
; Reset

RST00 DI ;Disable interrupts
JP INIT ;Initialize Hardware and go

;------------------------------------------------------------------------------
; TX a character over RS232

.ORG 0008H
RST08 JP TXA

;------------------------------------------------------------------------------
; RX a character over RS232 Channel A [Console], hold here until char
ready.

.ORG 0010H
RST10 JP RXA

;------------------------------------------------------------------------------
; Check serial status

.ORG 0018H
RST18 JP CKINCHAR

;------------------------------------------------------------------------------
RXA:
waitForChar: call CKINCHAR
JR Z, waitForChar
IN A,($81)
RET ; Char ready in A


;------------------------------------------------------------------------------
TXA: ;PUSH AF ; Store character
LD D,A ; store character without needing a stack/push
conout1: IN A,($80) ; Status byte
BIT 1,A ; Set Zero flag if still transmitting character
JR Z,conout1 ; Loop until flag signals ready
;POP AF ; Retrieve character
LD A,D ; retrieve character
OUT ($81),A ; Output the character
RET

;------------------------------------------------------------------------------
CKINCHAR
IN A,($80) ; Status byte
AND $01
CP $0 ; Z flag set if no char
RET

PRINT: LD A,(HL) ; Get character
OR A ; Is it $00 ?
RET Z ; Then RETurn on terminator
RST 08H ; Print it
INC HL ; Next Character
JR PRINT ; Continue until $00
RET
;------------------------------------------------------------------------------
INIT:
LD HL,TEMPSTACK ; Temp stack
LD SP,HL ; Set up a temporary stack
LD A,RTS_LOW
OUT ($80),A ; Initialise ACIA
LD HL,SIGNON1 ; Sign-on message
CALL PRINT ; Output string
LD A,(basicStarted); Check the BASIC STARTED flag
CP 'Y' ; to see if this is power-up
JR NZ,COLDSTART ; If not BASIC started then always do cold start
LD HL,SIGNON2 ; Cold/warm message
CALL PRINT ; Output string
CORW:
CALL RXA
AND %11011111 ; lower to uppercase
CP 'C'
JR NZ, CHECKWARM
RST 08H
LD A,$0D
RST 08H
LD A,$0A
RST 08H
COLDSTART: LD A,'Y' ; Set the BASIC STARTED flag
LD (basicStarted),A
JP $0100 ; Start BASIC COLD
CHECKWARM:
CP 'W'
JR NZ, CORW
RST 08H
LD A,$0D
RST 08H
LD A,$0A
RST 08H
JP $0103 ; Start BASIC WARM

SIGNON1: .BYTE CS
.BYTE "Z80 SBC By Grant Searle",CR,LF,0
SIGNON2: .BYTE CR,LF
.BYTE "Cold or warm start (C or W)? ",0

.END

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham
2014-03-25 00:48:52 UTC
Permalink
This is the demo program writing to ram and reading it back.

It works with the internal FPGA ram. Now to test with external ram...

; Ram debugging test for Grant Searle's FPGA computer

RTS_HIGH .EQU 0D5H
RTS_LOW .EQU 095H

.ORG $0000
;------------------------------------------------------------------------------
; Reset

RST00 DI ;Disable interrupts
JP INIT ;Initialize Hardware and go


; Ram debugging test
; no stack and so no POP, PUSH, CALL or RET instructions can be used
; code is 'unrolled' into one routine

INIT: LD A,RTS_LOW
OUT ($80),A ; Initialise ACIA
LD A,'A' ; Print an A as a test

; print routine using conout1 as a loop
LD D,A ; store character without needing a stack/push
conout1: IN A,($80) ; Status byte
BIT 1,A ; Set Zero flag if still transmitting character
JR Z,conout1 ; Loop until flag signals ready
LD A,D ; retrieve character
OUT ($81),A ; Output the character

; write a byte to ram, read it back and then print it
LD HL,$200F ; ram location to write to, same as stack location in Grant's
code
LD A,'N' ; byte to write
LD (HL),A ; store the byte
LD A,'X' ; put a new byte in A and this will get overwritten
LD A,(HL) ; read back the byte from ram, should be N

; if the value is 0-31 or >127 then won't display anything - may need to
put in a printhex routine
; though in a way it does not matter, if it is not printing N then it is
not reading from ram

; print routine using conout2 as a loop
LD D,A ; store character without needing a stack/push
conout2: IN A,($80) ; Status byte
BIT 1,A ; Set Zero flag if still transmitting character
JR Z,conout2 ; Loop until flag signals ready
LD A,D ; retrieve character
OUT ($81),A ; Output the character

; print a final character as a test
LD A,'Z'

; print routine using conout3 as a loop

LD D,A ; store character without needing a stack/push
conout3: IN A,($80) ; Status byte
BIT 1,A ; Set Zero flag if still transmitting character
JR Z,conout3 ; Loop until flag signals ready
LD A,D ; retrieve character
OUT ($81),A ; Output the character

HALT ; stop the program

.END

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham
2014-03-25 01:07:23 UTC
Permalink
But this does not work with external ram.

Not sure where to take things now...


On Tue, 25 Mar 2014 11:18:52 +1030, James Moxham
<moxhamj-CkBdp7X+***@public.gmane.org> wrote:

> This is the demo program writing to ram and reading it back.
>
> It works with the internal FPGA ram. Now to test with external ram...

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
yoda
2014-03-25 01:45:20 UTC
Permalink
Hi James

Can you attach your vhdl file here - it sounds like you might not be
setting the address then reading or writing the data - there is a setup
time for the address data to the external ram before you can read or write
the data - that is my suspicion and that may be the reason you see garbage.


On Monday, March 24, 2014 8:07:23 PM UTC-5, James Moxham (Dr_Acula) wrote:
>
> But this does not work with external ram.
>
> Not sure where to take things now...
>
>
> On Tue, 25 Mar 2014 11:18:52 +1030, James Moxham <mox...-CkBdp7X+***@public.gmane.org<javascript:>>
> wrote:
>
> This is the demo program writing to ram and reading it back.
>
> It works with the internal FPGA ram. Now to test with external ram...
>
>
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
oscarv
2014-03-25 09:00:43 UTC
Permalink
James,

I tried on mine - with the CP/M/Z80/external RAM VHDL code I sent you
earlier, but the HEX code changed to your test routine.

It prints ANZ as you'd want it to.

Regards,
James Moxham
2014-03-25 22:14:03 UTC
Permalink
Hi Oscar,

That is very helpful - it means the circuit works. I think that helps also
with Yoda's point as well.

My board always reads back $FF.

I'm going to try a few test programs tonight - a tight loop writing a
byte, and a tight loop reading a byte and then test pins with a logic
probe/CRO and see if they are what they are supposed to be.

Also Grant has got the boards I sent him and when he gets time he says he
will solder one up and see if he can replicate this.

Hey, it wouldn't be a genuine retro project without a fun bug to find?!

Cheers, James


On Tue, 25 Mar 2014 19:30:43 +1030, oscarv <vermeulen.oscar-***@public.gmane.org>
wrote:

> James,
>
> I tried on mine - with the CP/M/Z80/external RAM VHDL code I sent you
> earlier, but the HEX code changed to your test routine.
>
> It prints ANZ as you'd want it to.
>
> Regards,
>
> Oscar.
>
> --You received this message because you are subscribed to the Google
> Groups "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send
> an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/d/optout.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
oscarv
2014-03-25 22:57:06 UTC
Permalink
James,

On Tuesday, March 25, 2014 11:14:03 PM UTC+1, James Moxham (Dr_Acula) wrote:
>
> Hey, it wouldn't be a genuine retro project without a fun bug to find?!
>

No bugs means no hobby...

I also sent you the ZIP of my Multicomp project. You might want to see if
the pof/sof of it work - in which case it may be a case of settings in
Quartus.

Regards,

Oscar.

>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham
2014-03-26 11:01:38 UTC
Permalink
Hi Oscar et al,

It works!

Well, at least we can read and write a byte from external ram.

Well, it took some low level hacking, lots of work with the logic probe,
and at the end of the day, it is going to come down to asking Grant to add
a few clarifying lines to his website.

Ok, I pulled the ram chip out, and I compiled this very tiny program
(actually, tacked it onto the end of another program).

writestart: LD HL,$200F ; location to write to
LD A,'A' ; write this byte
writeloop: LD (HL),A ; write it
JP writeloop ; tight loop

I have taken out the ram chip and measured the voltages on the pins

4 H
8 L
24 L
28 L
30 L
112 L
113 L
114 L
115 L
118 L
119 H
120 H
121 L
122 L
125 L
126 H
129 L
132 L
133 H
134 H
135 L
136 L
137 L
139 L
141 L
142 L
143 L

Decoding these, D0-D7 is 01000001 which is ascii 41H which is correct as
this is A
The data lines are partially correct.

But the /WR pin is not toggling low. That kind of suggests it is not being
connected up within the FPGA which suggests a code problem.

Armed with this clue, I went back to Grant's original page and looked at
the code for the external ram. Nothing wrong there.

But - I am thinking, is external ram referenced anywhere else on the
website, in particular the change from internal to external ram.

Yes, it turns out it is referenced further down in two further places - in
chip selects, and in bus isolation. There are several lines to change here
as well when the change is made from internal to external ram.

The signon message for Basic has a few incorrect characters, but I think
this is a software rather than a hardware fault. So the fact I can read
and write a byte from external ram means the board is going to be ok. It
just will need the tracks A16 to 18 cut, and later we can work out how to
maybe add in banked memory.

Which means I can post out 4 boards to Martin, Max, Paul and Borut :)

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
Kip Koon
2014-03-26 13:46:12 UTC
Permalink
Hi Everyone!

I have just finished reading this entire thread and I must say this little
FPGA board project Grant Searle came up with is quite interesting indeed and
the progress you guys have made is great!. Has anyone programmed a 6809
version of the Multicomp yet? I'm kind of caught up at the moment building,
programming, troubleshooting and correcting a few things on the ECB 6x0x SBC
VME PCB project, so it may be a few days at least before I can reread Grant
Searle's Multicomp web page again. I really want to make one of these
things and see if I can get an Extended Colorless Basic running on this
little itty bitty computer! That would be great! That's even better than
the original 6-chip 6809 computer I breadboarded using Grant Searle's design
which I very much enjoyed doing! I can hardly wait to order my FPGA
development board. I have a big purchase coming up soon which I hopefully
can finalize this weekend, then I'll know how much funds I can dedicate to
this project. Keep up the great work guys. I'm very eager to join you all
in this endeavor. Take care my friends.

Kip



From: n8vem-/***@public.gmane.org [mailto:n8vem-/***@public.gmane.org] On Behalf Of
James Moxham
Sent: Wednesday, March 26, 2014 7:02 AM
To: n8vem-/***@public.gmane.org
Subject: Re: [N8VEM: 17616] Vintage + modern = fun



Hi Oscar et al,



It works!



Well, at least we can read and write a byte from external ram.



Well, it took some low level hacking, lots of work with the logic probe, and
at the end of the day, it is going to come down to asking Grant to add a few
clarifying lines to his website.



Ok, I pulled the ram chip out, and I compiled this very tiny program
(actually, tacked it onto the end of another program).



writestart: LD HL,$200F ; location to write to
LD A,'A' ; write this byte
writeloop: LD (HL),A ; write it
JP writeloop ; tight loop



I have taken out the ram chip and measured the voltages on the pins



4 H
8 L
24 L
28 L
30 L
112 L
113 L
114 L
115 L
118 L
119 H
120 H
121 L
122 L
125 L
126 H
129 L
132 L
133 H
134 H
135 L
136 L
137 L
139 L
141 L
142 L
143 L



Decoding these, D0-D7 is 01000001 which is ascii 41H which is correct as
this is A

The data lines are partially correct.



But the /WR pin is not toggling low. That kind of suggests it is not being
connected up within the FPGA which suggests a code problem.



Armed with this clue, I went back to Grant's original page and looked at the
code for the external ram. Nothing wrong there.



But - I am thinking, is external ram referenced anywhere else on the
website, in particular the change from internal to external ram.



Yes, it turns out it is referenced further down in two further places - in
chip selects, and in bus isolation. There are several lines to change here
as well when the change is made from internal to external ram.



The signon message for Basic has a few incorrect characters, but I think
this is a software rather than a hardware fault. So the fact I can read and
write a byte from external ram means the board is going to be ok. It just
will need the tracks A16 to 18 cut, and later we can work out how to maybe
add in banked memory.



Which means I can post out 4 boards to Martin, Max, Paul and Borut :)





--
You received this message because you are subscribed to the Google Groups
"N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an
email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
Martin Lukasek
2014-03-26 15:04:28 UTC
Permalink
Hi James,

great news, congratulation to your success! Good luck in future progress!

Martin


From: n8vem-/***@public.gmane.org [mailto:n8vem-/***@public.gmane.org] On Behalf Of James Moxham
Sent: Wednesday, March 26, 2014 12:02 PM
To: n8vem-/***@public.gmane.org
Subject: Re: [N8VEM: 17616] Vintage + modern = fun

Hi Oscar et al,

It works!

Well, at least we can read and write a byte from external ram.

Well, it took some low level hacking, lots of work with the logic probe, and at the end of the day, it is going to come down to asking Grant to add a few clarifying lines to his website.

Ok, I pulled the ram chip out, and I compiled this very tiny program (actually, tacked it onto the end of another program).

writestart: LD HL,$200F ; location to write to
LD A,'A' ; write this byte
writeloop: LD (HL),A ; write it
JP writeloop ; tight loop

I have taken out the ram chip and measured the voltages on the pins

4 H
8 L
24 L
28 L
30 L
112 L
113 L
114 L
115 L
118 L
119 H
120 H
121 L
122 L
125 L
126 H
129 L
132 L
133 H
134 H
135 L
136 L
137 L
139 L
141 L
142 L
143 L

Decoding these, D0-D7 is 01000001 which is ascii 41H which is correct as this is A
The data lines are partially correct.

But the /WR pin is not toggling low. That kind of suggests it is not being connected up within the FPGA which suggests a code problem.

Armed with this clue, I went back to Grant's original page and looked at the code for the external ram. Nothing wrong there.

But - I am thinking, is external ram referenced anywhere else on the website, in particular the change from internal to external ram.

Yes, it turns out it is referenced further down in two further places - in chip selects, and in bus isolation. There are several lines to change here as well when the change is made from internal to external ram.

The signon message for Basic has a few incorrect characters, but I think this is a software rather than a hardware fault. So the fact I can read and write a byte from external ram means the board is going to be ok. It just will need the tracks A16 to 18 cut, and later we can work out how to maybe add in banked memory.

Which means I can post out 4 boards to Martin, Max, Paul and Borut :)


--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/***@public.gmane.org<mailto:n8vem+***@googlegroups.com>.
To post to this group, send email to n8vem-/***@public.gmane.org<mailto:***@googlegroups.com>.
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
Alan Hightower
2014-02-25 00:13:02 UTC
Permalink
What I didn't realize until now is the you can get 74LVC244/245s in DIP
form factors. This changes things a bit. While not as quick as a quick
switch, and not omni-directional, they still will do the job for vintage
level translation in a PTH package.

There are plenty of DIP-8 fixed 3.3V switchers with integrated FETs too.
So you could design a solution that uses a cheap EVM like the XO2
7K-LUT break-out for $29 or a more integrated board with RAM like the
ones already mentioned to add memory, VGA, or other hard to implement
peripherals.

-Alan


On 2014-02-24 18:01, James Moxham wrote:
> Great ideas!
>
> Brainstorming option #3, on that website is a picture of a board with
> 4 headers around the outside. These boards are available quite
> inexpensively on ebay. I can't solder the chips, but I can make a
> board that could sit under the FPGA board and could also have headers
> and you could bring out the pins on very short lengths of ribbon
> cable. Now it is something that anyone can solder.
>
> I guess one challenge could be to interface it to the ECB bus. Even
> though there are lots of pins on a FPGA chip, there may still not be
> enough to talk to the ECB bus (unless you do clever things like share
> the ram pins). So you still might need a few glue logic chips like
> latches to latch in the address. Would also need extra chips also to
> do the 3V to 5V conversion. So maybe that makes it genuine vintage
> again!
>
> Cheers, James Moxham
>
Sergey
2014-02-25 01:38:32 UTC
Permalink
Well... one can install a software emulator of almost anything vintage (all
the way through 80's, and possibly early 90's) on a Raspberry Pi... Much
simpler and cheaper than using an FPGA, and all hardware problems suddenly
become software problems.

But I guess some common interests of the people on this group are:
- Build something with your own hands. (Addicted to the smell of the rosin
flux?!). It just turns out that old school DIP ICs and other through hole
components are easier to work with than modern SMD parts. (But some SMD
parts are actually pretty easy to work with too, so definitely suggest
trying some small SMD projects as well)
- Learn how hardware works, design something yourself. Again older
components are more easy to understand than modern SoCs.
- See some piece old technology in action (be that Z80 CPU, or floppy
drives). It could be just the old software as well (but if it just that -
use emulator).

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Bob Grieb
2014-02-25 01:46:20 UTC
Permalink
Hi,

   This is slightly off-topic, but since we are talking about FPGA's and programmable logic, just thought I would mention that there is a free, downloadable, and presumably synthesizeable Z80 core written in Verilog available on the web.   I have been using it for a while to simulate an 80's music synthesizer and learn how the code works.  No bugs found so far.  Also, just wanted to mention that ASIC/FPGA signals are often buffered before connecting to a bus, both for drive, and also so that if something gets shorted, it's just a buffer chip that needs replacing, not a QFP-144 chip.

    Bob




________________________________
From: Sergey <skiselev-***@public.gmane.org>
To: n8vem-/***@public.gmane.org
Sent: Monday, February 24, 2014 8:38 PM
Subject: Re: [N8VEM: 17403] Vintage + modern = fun



Well... one can install a software emulator of almost anything vintage (all the way through 80's, and possibly early 90's) on a Raspberry Pi... Much simpler and cheaper than using an FPGA, and all hardware problems suddenly become software problems.

But I guess some common interests of the people on this group are:
- Build something with your own hands. (Addicted to the smell of the rosin flux?!). It just turns out that old school DIP ICs and other through hole components are easier to work with than modern SMD parts. (But some SMD parts are actually pretty easy to work with too, so definitely suggest trying some small SMD projects as well)
- Learn how hardware works, design something yourself. Again older components are more easy to understand than modern SoCs.
- See some piece old technology in action (be that Z80 CPU, or floppy drives). It could be just the old software as well (but if it just that - use emulator).


--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Nikolay Dimitrov
2014-02-25 06:24:59 UTC
Permalink
Sergey,

Yep, that's entirely true. There are definitely advantages of using
emulators, but one can miss the experience with real hardware, which can
be connected real actual peripheral devices. I can share that I was
incredibly proud when prototyped the PPIDE "flying-wires-style" and it
worked with real IDE disk. I wouldn't be so satisfied if it "just works"
inside emulated environment.

Then there's the issue that the cycle-accurate execution of complex
system (especially one that contains lots of async circuits) is quite
heavy burden, and I personally doubt that RPi can handle it.

Regards,
picmaster


On 2/25/2014 3:38 AM, Sergey wrote:
> Well... one can install a software emulator of almost anything vintage
> (all the way through 80's, and possibly early 90's) on a Raspberry
> Pi... Much simpler and cheaper than using an FPGA, and all hardware
> problems suddenly become software problems.
>
> But I guess some common interests of the people on this group are:
> - Build something with your own hands. (Addicted to the smell of the
> rosin flux?!). It just turns out that old school DIP ICs and other
> through hole components are easier to work with than modern SMD parts.
> (But some SMD parts are actually pretty easy to work with too, so
> definitely suggest trying some small SMD projects as well)
> - Learn how hardware works, design something yourself. Again older
> components are more easy to understand than modern SoCs.
> - See some piece old technology in action (be that Z80 CPU, or floppy
> drives). It could be just the old software as well (but if it just
> that - use emulator).
>
> --
> You received this message because you are subscribed to the Google
> Groups "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send
> an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/groups/opt_out.
p***@public.gmane.org
2014-02-25 10:07:26 UTC
Permalink
On a second thought, I think that Sergey's idea for emulation can be put
to a good use, like performing formal verification on N8VEM SW releases
(but on a regular PC host, not RPi :D).

We can run the new builds inside emulator environment and track memory
and IO accesses to confirm whether the SW is behaving as expected, at
least to check the basic functionality for regressions (it's just easier
to automatically run repeatable tests after build compared to burning new
eprom/flash chip and manually testing on the target).

I did something similar before receiving my first SBC v2 board. I desperately
wanted to see this thing running on my desk so I used one old Z80 emulator
(need to check which one) and hacked it a little bit to separate the memory
and IO interfaces, to add basic support for memory paging HW on the SBC, and
also route the UART communication to local console or TCP port. Part of this
code was actually printing all IO accesses, so I can see them and add the
missing peripherals. Yep, not a full system test but such concept can be
extended for formal verification.

As end result, we're still expected to enjoy our systems fully manually ;).

Do you guys find the idea of running automated system tests on the N8VEM SW
releases practical?

Regards,
picmaster

P.S.: At the time I reworked this Z80 emulator I didn't knew that SIMH also
supports N8VEM.

-------------------------------------
Mail.BG: Безплатен e-mail адрес. Най-добрите характеристики на българския пазар - 20 GB пощенска кутия, 1 GB прикрепен файл, безплатен POP3, мобилна версия, SMS известяване и други. http://mail.bg

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Kip Koon
2014-03-05 11:01:43 UTC
Permalink
Hi Picmaster!
Have you seen the recent email on the N8VEM list about ordering the new ECB 6x0x SBC VME PCB? It will run a 6809, 6309, 6802 or a 6502, has 512KB of SRAM with an MMU, 512KB flash memory, a Propeller chip running an SD card, VGA output, PS/2 keyboard input, a 6821 PIA, two 6522 VIAs, a 6551 ACIA, a 6840 PTM and as you all been talking about 35 TTL logic chips. Yes, this is bigger than a 3U Eurocard size. It is actually a 6U Eurocard size which is basically about twice as wide and the same height. Here is a link to a picture of my card as it currently exists.
https://www.dropbox.com/s/cgfedtwer28sziu/Pic_0222_280.jpg
The documentation is here.
http://n8vem-sbc.pbworks.com/w/browse/#view=ViewFolder&param=ECB%206x0x
Check it out and see if it is something you would be interested in building. Orders for bare boards are being taken now. Oh yeah, I'm going to run a Hitachi HD63C09P microprocessor on mine! I can hardly wait to see my test build run! Take care my friends.
Kip

-----Original Message-----
From: n8vem-/***@public.gmane.org [mailto:n8vem-/***@public.gmane.org] On Behalf Of Nikolay Dimitrov
Sent: Monday, February 24, 2014 4:29 PM
To: n8vem-/***@public.gmane.org
Subject: Re: [N8VEM: 17393] Vintage + modern = fun

In general, the main question is "What's your motivation for building the N8VEM computer". It can be just because you like vintage stuff, or you like to have small hackable computer, or you want to have machine build with modern parts/technology. As long as these groups of people share knowledge and direction, everything will be OK. I respect that most of the people in this community like to use TTL chips for their projects, and I won't be the one to ruin their fun :D. On the contrary, no-one stops me from connecting one of my FPGA boards to the SBC, or even to implement "N8VEM-on-a-chip" (actually I secretly dream of having a 6809 even as a soft-core, so I can explore this outstanding CPU).

I believe that if we want, we can smartly use programmable logic to complement the mainline N8VEM development, without breaking the fun for others. One idea such idea could be a community-designed MMU for our boards :D?

About the actual PCBs - my understanding is that most of our hobby systems will be able to fit in chips like Spartan-3E 500K (Papilio One), and this thingy is not a challenge to route and solder. I would be much more concerned about the 5V compatibility, which can be too big thing to loose for a hobby machine.

Regards,
picmaster

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Nikolay Dimitrov
2014-03-06 19:05:57 UTC
Permalink
Hi Kip,

I definitely hear you. It just takes an enormous amount of
self-discipline to not buy all possible N8VEM boards and to stack them
on my desk. Same holds for all kinds of S100 computers, PDP-11s, VAXes
and all the other cool stuff...

Regards,
picmaster


On 3/5/2014 1:01 PM, Kip Koon wrote:
> Hi Picmaster!
> Have you seen the recent email on the N8VEM list about ordering the new ECB 6x0x SBC VME PCB? It will run a 6809, 6309, 6802 or a 6502, has 512KB of SRAM with an MMU, 512KB flash memory, a Propeller chip running an SD card, VGA output, PS/2 keyboard input, a 6821 PIA, two 6522 VIAs, a 6551 ACIA, a 6840 PTM and as you all been talking about 35 TTL logic chips. Yes, this is bigger than a 3U Eurocard size. It is actually a 6U Eurocard size which is basically about twice as wide and the same height. Here is a link to a picture of my card as it currently exists.
> https://www.dropbox.com/s/cgfedtwer28sziu/Pic_0222_280.jpg
> The documentation is here.
> http://n8vem-sbc.pbworks.com/w/browse/#view=ViewFolder&param=ECB%206x0x
> Check it out and see if it is something you would be interested in building. Orders for bare boards are being taken now. Oh yeah, I'm going to run a Hitachi HD63C09P microprocessor on mine! I can hardly wait to see my test build run! Take care my friends.
> Kip

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Andrew Bingham
2014-03-07 05:08:38 UTC
Permalink
What would be neat would be a board with a 5V tolerant surface mount FPGA
with say 144 pins, with pins connected to the ECB bus on one side and with
a prototyping area on the other side.

Configurable as a CPU board, or a peripheral, or whatever.

Andrew

On Thursday, March 6, 2014 11:05:57 AM UTC-8, picmaster wrote:
>
> Hi Kip,
>
> I definitely hear you. It just takes an enormous amount of
> self-discipline to not buy all possible N8VEM boards and to stack them
> on my desk. Same holds for all kinds of S100 computers, PDP-11s, VAXes
> and all the other cool stuff...
>
> Regards,
> picmaster
>
>
> On 3/5/2014 1:01 PM, Kip Koon wrote:
> > Hi Picmaster!
> > Have you seen the recent email on the N8VEM list about ordering the new
> ECB 6x0x SBC VME PCB? It will run a 6809, 6309, 6802 or a 6502, has 512KB
> of SRAM with an MMU, 512KB flash memory, a Propeller chip running an SD
> card, VGA output, PS/2 keyboard input, a 6821 PIA, two 6522 VIAs, a 6551
> ACIA, a 6840 PTM and as you all been talking about 35 TTL logic chips.
> Yes, this is bigger than a 3U Eurocard size. It is actually a 6U
> Eurocard size which is basically about twice as wide and the same height.
> Here is a link to a picture of my card as it currently exists.
> > https://www.dropbox.com/s/cgfedtwer28sziu/Pic_0222_280.jpg
> > The documentation is here.
> > http://n8vem-sbc.pbworks.com/w/browse/#view=ViewFolder&param=ECB%206x0x
> > Check it out and see if it is something you would be interested in
> building. Orders for bare boards are being taken now. Oh yeah, I'm going
> to run a Hitachi HD63C09P microprocessor on mine! I can hardly wait to see
> my test build run! Take care my friends.
> > Kip
>
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham
2014-03-07 05:13:01 UTC
Permalink
Good idea. This first board is just a start so we can do some experiments.
There could be a lot of scope building something in a eurocard size with
an ECB bus and chips to do the 3V to 5V translation. The board would be
rather sparse so lots of room for a prototyping area.

Addit: Just got an email saying the boards have been posted so ? another
week.

Cheers, James



On Fri, 07 Mar 2014 15:38:38 +1030, Andrew Bingham <abingham-***@public.gmane.org>
wrote:

> What would be neat would be a board with a 5V tolerant surface mount
> FPGA with say 144 pins, with pins connected to the ECB bus on one side
> and >with a prototyping area on the other side.
>
> Configurable as a CPU board, or a peripheral, or whatever.
>
> Andrew
>
> On Thursday, March 6, 2014 11:05:57 AM UTC-8, picmaster wrote:
>> Hi Kip,
>> I definitely hear you. It just takes an enormous amount of
>> self-discipline to not buy all possible N8VEM boards and to stack them
>> on my desk. Same holds for all kinds of S100 computers, PDP-11s, VAXes
>> and all the other cool stuff...
>> Regards,picmaster

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
Andrew Bingham
2014-03-12 22:47:43 UTC
Permalink
Digikey and Arrow Electronics both have ~500 of the older Altera FLEX 6000
FPGAs left in stock, in QFP type packages, for $30. This is a part that
will work directly at 5V with no level translation needed.

I'm thinking of doing a really simple design with a QFP part with pins
connected to all of the pins that N8VEM "uses" on the ECB bus, and the rest
broken out with a prototyping area, and a spot for the EEPROM to load up
the FPGA.

My makerspace could clearly use a toaster oven with PID temperature control
to do reflow soldering of SMD parts ;)

On Thursday, March 6, 2014 9:13:01 PM UTC-8, James Moxham (Dr_Acula) wrote:
>
> Good idea. This first board is just a start so we can do some experiments.
> There could be a lot of scope building something in a eurocard size with an
> ECB bus and chips to do the 3V to 5V translation. The board would be rather
> sparse so lots of room for a prototyping area.
>
> Addit: Just got an email saying the boards have been posted so ? another
> week.
>
> Cheers, James
>
>
>
> On Fri, 07 Mar 2014 15:38:38 +1030, Andrew Bingham <abin...-***@public.gmane.org<javascript:>>
> wrote:
>
> What would be neat would be a board with a 5V tolerant surface mount FPGA
> with say 144 pins, with pins connected to the ECB bus on one side and with
> a prototyping area on the other side.
>
> Configurable as a CPU board, or a peripheral, or whatever.
>
> Andrew
>
> On Thursday, March 6, 2014 11:05:57 AM UTC-8, picmaster wrote:
>>
>> Hi Kip,
>>
>> I definitely hear you. It just takes an enormous amount of
>> self-discipline to not buy all possible N8VEM boards and to stack them
>> on my desk. Same holds for all kinds of S100 computers, PDP-11s, VAXes
>> and all the other cool stuff...
>>
>> Regards,
>> picmaster
>>
>>
>
>
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
Jim Strickland
2014-03-13 03:24:33 UTC
Permalink
I got one of these, a syringe of solder paste (leaded), and a flux pen.
Works a treat, as Dave would say. Ebay, about 80 bucks
U.S. http://www.eevblog.com/2011/04/25/eevblog-167-atten-858d-hot-air-rework-review/
Yes, a reflow oven would probably be better, but even in my early "monkey
with a blowtorch" experiments with the thing I never managed to kill any
ICs. -JRS


> My makerspace could clearly use a toaster oven with PID temperature
> control to do reflow soldering of SMD parts ;)
>
>>
>>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
Kip Koon
2014-03-26 13:03:31 UTC
Permalink
Hi James!

I hadn't read much on this thread until now. I have also been thinking of
designing a PCB for Grant's Triple CPU FPGA project myself which I would
really enjoy doing. It seems you guys have beaten me to the punch though,
so I would like to put in a request for a PCB too if it is not too late. I
too would like to get my feet wet learning about FPGAs also. Take care my
friends.

Kip



From: n8vem-/***@public.gmane.org [mailto:n8vem-/***@public.gmane.org] On Behalf Of
James Moxham
Sent: Friday, March 07, 2014 12:13 AM
To: n8vem-/***@public.gmane.org
Subject: Re: [N8VEM: 17525] Vintage + modern = fun



Good idea. This first board is just a start so we can do some experiments.
There could be a lot of scope building something in a eurocard size with an
ECB bus and chips to do the 3V to 5V translation. The board would be rather
sparse so lots of room for a prototyping area.



Addit: Just got an email saying the boards have been posted so ? another
week.



Cheers, James







On Fri, 07 Mar 2014 15:38:38 +1030, Andrew Bingham <abingham-***@public.gmane.org>
wrote:



What would be neat would be a board with a 5V tolerant surface mount FPGA
with say 144 pins, with pins connected to the ECB bus on one side and with a
prototyping area on the other side.



Configurable as a CPU board, or a peripheral, or whatever.



Andrew

On Thursday, March 6, 2014 11:05:57 AM UTC-8, picmaster wrote:

Hi Kip,

I definitely hear you. It just takes an enormous amount of
self-discipline to not buy all possible N8VEM boards and to stack them
on my desk. Same holds for all kinds of S100 computers, PDP-11s, VAXes
and all the other cool stuff...

Regards,
picmaster





--
You received this message because you are subscribed to the Google Groups
"N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an
email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
yoda
2014-03-07 17:03:32 UTC
Permalink
That is one of the things on my list of things I am going to do though I am
going to use a Saturn board from numato labs that I can plug on to the ECB
board. It gives me plenty of I/O and has 32MB x 16 SDram on it. I am
going to use 74lvc244's and 74lvc245's to make it 5V tolerant. I think I
should be able to provide 16MB of memory, programmable timer, SD card
interface, and hires VGA display on a signal board. I plan to do the same
thing for a S100 board as well. My first step will be to create a SBC 68K
with this board to construct and test all the interfaces. I am going to
use a 68sec000 as it runs at 3.3v so initially I can just connect all the
signals to the Saturn board and control all the signals. I prefer the
Xilinx chip as I already have several boards laying around. I will
probably take Grant's code and make it run on run of my boards as well.

Dave

On Thursday, March 6, 2014 11:08:38 PM UTC-6, Andrew Bingham wrote:
>
> What would be neat would be a board with a 5V tolerant surface mount FPGA
> with say 144 pins, with pins connected to the ECB bus on one side and with
> a prototyping area on the other side.
>
> Configurable as a CPU board, or a peripheral, or whatever.
>
>>
>>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
yoda
2014-02-24 22:30:41 UTC
Permalink
Hi Vince

The MicroNova board looks interesting - my only problem is not enough I/O
pins - for a little more you can get 118 I/Os from Numato. I invision
using the on board memory to get to 16MB of memory on S100, use other parts
of the same memory for a hi-res graphics display, a high res timer, serial
I/O and SD Disk Interface. All of this on one board (call it a super I/O
memory board). I am just going to use a bunch of 74lvc244's and
74lvc245's to interface the 3.3v to 5V S100. I like the idea of
experimenting with adding different types of I/O devices with not having to
do a lot of physical rewiring. I am a ways off from doing much at moment
but I am trying to free up some time to start work.

I think the microNova and Numato Saturn board gets rid of the fear of SMT
as they can be used in through hole configurations.


On Monday, February 24, 2014 3:13:18 PM UTC-6, Vince Mulhollon wrote:
>
> On Monday, February 24, 2014 2:10:29 PM UTC-6, moustache66 wrote:
>
>> Usage of FPGAs leaves the hobbyist range, as is requires excellent
>> soldering skills when you do not want to draw on preconfigured developer
>> boards.
>>
>
> Plenty of simple, huge, TQFP packages for FPGAs. Its not all BGAs. TQFP
> = very easy to solder. BGA = I agree with you.
>
> I will say the biggest annoyance is no sockets. So once that chip goes
> on, and it'll probably be the first thing stuck on the board, now 100% of
> the time afterwards its anti-static wrist strap time.
>
> The big problem is now you've got a double sided PCB with like 100 signal
> pins to route in about one square inch and a 1.8 volt switcher and level
> converters and some manner of programming interface, at least a jtag but
> preferably a full USB and support for it, and I'm not entirely sure it can
> be made to work on a mere DS PCB. Might be easier to route traces for 20
> TTL chips after all. Obviously if you only need 20 IO you only wire up 20
> IO, and space them very far apart so a little solder bridge here or there
> doesn't matter anyway. If your design doesn't connect pins 6 and 8 to
> anything and there's a short from 7 to 8 it won't matter very much.. If
> you implement 2of3 algorithms like "input 1" is 2of3 of pins 1 and 2 and 3,
> then as long as you can avoid shorts or opens on more than 1/3 of the IO
> pins you're OK, so no problemo since getting to 99% or better is not very
> hard. And if you've got 100 I/O pins "only" having 33 isn't so bad.
> Another strategy I've seen which is a bit ugly in my opinion is to
> sacrifice IO pins on opposite sides of the package, just don't use them in
> your FPGA design. Usually not very hard to find some. Then use those two
> pins to superglue the chip to the board once its aligned perfectly before
> even warming up the soldering iron. Don't sacrifice power/ground pins just
> unused IO for this supergluing. This is a waste on a big QFP, just use
> some tape to hold it down or a small weight and solder around it. Can't do
> that with microwave bypass caps LOL!
>
> I have a micronova Mercury board which I have on a S100 prototyping board
> doing approx nothing so far but powering up. But its got all the level
> shifting and power stuff and USB programming interface and everything all
> in a DIP-64 outline (like a 68000). I'm working on way too many other
> things, but eventually I have plans for this FPGA along the lines of a
> floating point accelerator or maybe a smart-ish hardware I2C driver
> appliance card. It doesn't have the IO to do much more. Everything takes
> longer than expected, says the guy who still doesn't have his '286 board up
> for no reason other than lack of lab time. The "polar vortex" has helped
> me catch up quite a bit.
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Kip Koon
2014-03-05 10:42:38 UTC
Permalink
Hi Joachim!
I'm experimenting with developing 6809/6309 SBCs as well. What type have you done thus far?
Kip

-----Original Message-----
From: n8vem-/***@public.gmane.org [mailto:n8vem-/***@public.gmane.org] On Behalf Of Joachim Gaßler
Sent: Monday, February 24, 2014 3:10 PM
To: n8vem-/***@public.gmane.org
Subject: Re: [N8VEM: 17391] Vintage + modern = fun

Am 24.02.2014 03:56, schrieb Andrew Bingham:
> [...]
> One thought I've had is replacing a bunch of that logic with 1-2 CPLD
> devices, PLCC in through-hole sockets. I'd be interested if people
> would find this "contrary" to the hobbyist nature of the N8VEM
> project, or if using a more modern tool to get everything to fit
> nicely on one board would be acceptable as long as it could be
> programmed using typical tools we all have.
In my opinion the usage of THT CPLDs is okay, as it shrinks the TTL graveyard to a neatly arranged flower bed =). Another advantage of using BST-capable CPLDs is that you use exactly one hardware device for programming the complete board firmware - ROM as well as CPLD -, that is the JTAG programming cable. No need to buy an extra Willem Programmer or sth like that.

I have a pretty beautiful 6809 SBC developed using CPLDs and I find it amazing, how simple it is to patch another piece of hardware to the board and rearrange the logic in the CPLDs to access e.g. I2C devices or something else.

Usage of FPGAs leaves the hobbyist range, as is requires excellent soldering skills when you do not want to draw on preconfigured developer boards.

Joe

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/groups/opt_out.
Joachim Gaßler
2014-03-05 11:31:42 UTC
Permalink
Hello Kip,

Am 05.03.2014 11:42, schrieb Kip Koon:
> Hi Joachim!
> I'm experimenting with developing 6809/6309 SBCs as well. What type have you done thus far?
> Kip
>
I did not build a 6809 SBC from the N8VEM group but developed one "all
by myself". I am not familiar with KiCAD, but I bought a non profit
license of Eagle 4.14 several years ago. Thus my PCB layout size is
restricted to 100x160mm double layer. My 6809 SBC was intended to have
1MB MMU-mapped RAM, IDE HDD port with 16-bit DMA, a RTC and USB Terminal
I/O.

After having the PCB produced, it turned out that two design errors led
to restrictions regarding the IDE port. For databus isolation, i use a
74HCT245 instead of a 74HCT646. The '646 is able to buffer bytes in both
directions, which the '245 does not. Although I worried about that
problem some months ago, I just forgot about (yes, I'm growin old =) ),
and now I have to patch the board to gain 16-bit access to the HDD port.
Fortunately, pinouts of '646 and '245 differ not too much.

More severe is the problem that I connected the DIOW/DIOR signals from
the IDE port together with the RD/WR signals from the memory interface
instead of splitting them into different signals. So no DMA for now.

The USB terminal with a FT245RL is a very neat solution. It takes less
space than a classical 8250/MAX232/DSub-9 design.

By now, I am waiting for the RAM chips to arrive. The MMU is tested on
paper, but not on real hardware.

If you like to follow, I update my blog (http://www.m6809.de , sry, it's
german) loosely.

Regards Joe
oscarv
2014-03-23 08:22:09 UTC
Permalink
James,

Yes, without SD card you get to the initial "Press Space" and also into the
monitor and basic.

Regards,
James Moxham
2014-03-23 09:23:44 UTC
Permalink
Thanks++ for that.

It is increasingly looking like a wiring error as I get an endless stream
of garbage - same stream whether use VGA display or serial output.

I used your code exactly as it is, and that is very helpful to know that
it comes up with a signon message.

Ok back to study my board layout...

Cheers, James


On Sun, 23 Mar 2014 18:52:09 +1030, oscarv <vermeulen.oscar-***@public.gmane.org>
wrote:

> James,
>
> Yes, without SD card you get to the initial "Press Space" and also into
> the monitor and basic.
>
> Regards,
>
> Oscar.
>
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham
2014-03-23 22:39:21 UTC
Permalink
Oscar has sent me a PM with some very helpful suggestions on debugging my
circuit.

He points out that the current programs Grant is using needs a stack
pointer in ram to work. The idea would be to write a series of simpler
programs to debug the external ram. Starting with the simplest:
1) A program in ROM that just outputs a single letter via the serial port
and doesn't use ram
2) A program in ROM that writes one byte to RAM location zero, reads it
back and outputs that byte
3) A program in ROM that writes to different locations in RAM and then
reads them back and outputs the location and the byte.

So I think that gives me something to work with.

I don't know about sending out boards where there ram doesn't work - I'm
in two minds about that. If people want me to send them out I can. There
are at least three vias that need drilling out and three wire links to
install so far, and possibly more corrections needed.

Cheers, James



On Mon, 24 Feb 2014 08:22:52 +1030, Nikolay Dimitrov <picmaster-***@public.gmane.org>
wrote:

> Gents,
>
> FYI - If you love both vintage and modern electronics, this can make
> your heart beat faster: mix&match Z80/6502/6809 CPU cores and
> peripherals on a low cost FPGA board.
>
> http://webcache.googleusercontent.com/search?q=cache:btyLT1AWpO8J:searle.hostei.com/grant/Multicomp/+&cd=1&hl=en&ct=clnk&gl=us
>
> Kudos to the original author of this (already dead) site, and to a
> friend of mine who shared this with me.
>
> Kind regards,
> picmaster
Grant Searle
2014-03-26 22:40:07 UTC
Permalink
>
> Hi.

The web hoster has temporarily blocked my site due to high CPU usage (can I
blame you guys ;) )

Anyway, I keep a full mirror of my site up to date here...
http://zx80.netai.net/grant/

And, in particular, the Multicomp page here:
http://zx80.netai.net/grant/Multicomp/index.html

Please use the main server whenever possible, but go to the above if the
main site is down (again...)

Glad to see my pages are of interest to you. I'm currently soldering up one
of James's boards so hope to get it running on there in a couple of days
(bit busy at the moment so not much spare time).

Any probs, please feel free to contact me.

Have fun.

Grant
Main:
http://searle.hostei.com/grant/

Mirror:
http://zx80.netai.net/grant/


--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham
2014-03-27 11:44:42 UTC
Permalink
Grant, your site is popular!

The following is just a little reference file - a simple external ram test
program that doesn't need a stack so fails in a more predictable way if
external ram is not working. Assembly, the Intel Hex for this program, and
VHDL

If using this, in the ROM folder, rename BASIC.HEX as BASIC_ORIGINAL.HEX
or something. Copy the intel hex code into notepad and save as BASIC.HEX.
Copy the VHDL into Quartus and compile it.

This prints to a VGA display - I find that a little quicker to debug than
using a serial terminal program.

Also - I was downloading to ram but then when you cycle the power you lose
the program. Downloading to flash is only a few seconds more. Plug the
jtag plug into the outside socket. Change the Mode to Active Serial
Programming and point it to microcomputer.pof
You only need to do that once - Quartus remembers this forever.

; Ram debugging test for Grant Searle's FPGA computer - prints ABCD if
external ram working

RTS_HIGH .EQU 0D5H
RTS_LOW .EQU 095H


.ORG $0000
;------------------------------------------------------------------------------
; Reset

RST00 DI ;Disable interrupts
JP INIT ;Initialize Hardware and go

; Ram debugging test
; no stack and so no POP, PUSH, CALL or RET instructions can be used
; code is 'unrolled' into one routine

INIT: LD A,RTS_LOW
OUT ($80),A ; Initialise ACIA
LD A,'A' ; Print an A as a test

; print routine using conout1 as a loop
LD D,A ; store character without needing a stack/push
conout1: IN A,($80) ; Status byte
BIT 1,A ; Set Zero flag if still transmitting character
JR Z,conout1 ; Loop until flag signals ready
LD A,D ; retrieve character
OUT ($81),A ; Output the character

; write a byte to ram, read it back and then print it
LD HL,$200F ; ram location to write to, same as stack location in Grant's
code
LD A,'B' ; byte to write
LD (HL),A ; store the byte
LD A,'X' ; put a new byte in A and this will get overwritten
LD A,(HL) ; read back the byte from ram

; if the value is 0-31 or >127 then won't display anything - may need to
put in a printhex routine
; though in a way it does not matter, if it is not printing N then it is
not reading from ram

; print routine using conout2 as a loop
LD D,A ; store character without needing a stack/push
conout2: IN A,($80) ; Status byte
BIT 1,A ; Set Zero flag if still transmitting character
JR Z,conout2 ; Loop until flag signals ready
LD A,D ; retrieve character
OUT ($81),A ; Output the character

; write to location 4000H
LD HL,$4000 ; ram location to write to
LD A,'C' ; byte to write
LD (HL),A ; store the byte
LD A,'X' ; put a new byte in A and this will get overwritten
LD A,(HL) ; read back the byte from ram

LD D,A ; store character without needing a stack/push
conout3: IN A,($80) ; Status byte
BIT 1,A ; Set Zero flag if still transmitting character
JR Z,conout3 ; Loop until flag signals ready
LD A,D ; retrieve character
OUT ($81),A ; Output the character

; write to location E000H
; print routine using conout4 as a loop

LD HL,$E000 ; ram location to write to
LD A,'D' ; byte to write
LD (HL),A ; store the byte
LD A,'X' ; put a new byte in A and this will get overwritten
LD A,(HL) ; read back the byte from ram

LD D,A ; store character without needing a stack/push
conout4: IN A,($80) ; Status byte
BIT 1,A ; Set Zero flag if still transmitting character
JR Z,conout4 ; Loop until flag signals ready
LD A,D ; retrieve character
OUT ($81),A ; Output the character



HALT ; stop the program

.END


:20000000F3C304003E95D3803E4157DB80CB4F28FA7AD381210F203E42773E587E57DB80B8
:20002000CB4F28FA7AD3812100403E43773E587E57DB80CB4F28FA7AD3812100E03E447793
:0E0040003E587E57DB80CB4F28FA7AD381766C
:00000001FF



-- This file is copyright by Grant Searle 2014
-- You are free to use this file in your own projects but must never
charge for it nor use it without
-- acknowledgement.
-- Please ask permission from Grant Searle before republishing elsewhere.
-- If you use this file or any part of it, please add an acknowledgement
to myself and
-- a link back to my main web site http://searle.hostei.com/grant/
-- and to the "multicomp" page at
http://searle.hostei.com/grant/Multicomp/index.html
--
-- Please check on the above web pages to see if there are any updates
before using this file.
-- If for some reason the page is no longer available, please search for
"Grant Searle"
-- on the internet to see if I have moved to another web hosting service.
--
-- Grant Searle
-- eMail address available on my main web page link above.

library ieee;
use ieee.std_logic_1164.all;
use IEEE.STD_LOGIC_ARITH.all;
use IEEE.STD_LOGIC_UNSIGNED.all;

entity Microcomputer is
port(
n_reset : in std_logic;
clk : in std_logic;

sramData : inout std_logic_vector(7 downto 0);
sramAddress : out std_logic_vector(15 downto 0);
n_sRamWE : out std_logic;
n_sRamCS : out std_logic;
n_sRamOE : out std_logic;

rxd1 : in std_logic;
txd1 : out std_logic;
rts1 : out std_logic;

rxd2 : in std_logic;
txd2 : out std_logic;
rts2 : out std_logic;

videoSync : out std_logic;
video : out std_logic;

videoR0 : out std_logic;
videoG0 : out std_logic;
videoB0 : out std_logic;
videoR1 : out std_logic;
videoG1 : out std_logic;
videoB1 : out std_logic;
hSync : out std_logic;
vSync : out std_logic;

ps2Clk : inout std_logic;
ps2Data : inout std_logic;

sdCS : out std_logic;
sdMOSI : out std_logic;
sdMISO : in std_logic;
sdSCLK : out std_logic;
driveLED : out std_logic :='1'
);
end Microcomputer;

architecture struct of Microcomputer is

signal n_WR : std_logic;
signal n_RD : std_logic;
signal cpuAddress : std_logic_vector(15 downto 0);
signal cpuDataOut : std_logic_vector(7 downto 0);
signal cpuDataIn : std_logic_vector(7 downto 0);

signal basRomData : std_logic_vector(7 downto 0);
signal internalRam1DataOut : std_logic_vector(7 downto 0);
signal internalRam2DataOut : std_logic_vector(7 downto 0);
signal interface1DataOut : std_logic_vector(7 downto 0);
signal interface2DataOut : std_logic_vector(7 downto 0);
signal sdCardDataOut : std_logic_vector(7 downto 0);

signal n_memWR : std_logic :='1';
signal n_memRD : std_logic :='1';

signal n_ioWR : std_logic :='1';
signal n_ioRD : std_logic :='1';

signal n_MREQ : std_logic :='1';
signal n_IORQ : std_logic :='1';

signal n_int1 : std_logic :='1';
signal n_int2 : std_logic :='1';

signal n_externalRamCS : std_logic :='1';
signal n_internalRam1CS : std_logic :='1';
signal n_internalRam2CS : std_logic :='1';
signal n_basRomCS : std_logic :='1';
signal n_interface1CS : std_logic :='1';
signal n_interface2CS : std_logic :='1';
signal n_sdCardCS : std_logic :='1';

signal serialClkCount : std_logic_vector(15 downto 0);
signal cpuClkCount : std_logic_vector(5 downto 0);
signal sdClkCount : std_logic_vector(5 downto 0);
signal cpuClock : std_logic;
signal serialClock : std_logic;
signal sdClock : std_logic;
begin

--
____________________________________________________________________________________
-- CPU CHOICE GOES HERE

cpu1 : entity work.t80s
generic map(mode => 1, t2write => 1, iowait => 0)
port map(
reset_n => n_reset,
clk_n => cpuClock,
wait_n => '1',
int_n => '1',
nmi_n => '1',
busrq_n => '1',
mreq_n => n_MREQ,
iorq_n => n_IORQ,
rd_n => n_RD,
wr_n => n_WR,
a => cpuAddress,
di => cpuDataIn,
do => cpuDataOut);

--
____________________________________________________________________________________
-- ROM GOES HERE

rom1 : entity work.Z80_BASIC_ROM -- 8KB BASIC
port map(
address => cpuAddress(12 downto 0),
clock => clk,
q => basRomData
);

--
____________________________________________________________________________________
-- RAM GOES HERE

sramAddress(15 downto 0) <= cpuAddress(15 downto 0);
sramData <= cpuDataOut when n_memWR='0' else (others => 'Z');
n_sRamWE <= n_memWR or n_externalRamCS;
n_sRamOE <= n_memRD or n_externalRamCS;
n_sRamCS <= n_externalRamCS;

--
____________________________________________________________________________________
-- INPUT/OUTPUT DEVICES GO HERE
io1 : entity work.SBCTextDisplayRGB
port map (
n_reset => n_reset,
clk => clk,

-- RGB video signals
hSync => hSync,
vSync => vSync,
videoR0 => videoR0,
videoR1 => videoR1,
videoG0 => videoG0,
videoG1 => videoG1,
videoB0 => videoB0,
videoB1 => videoB1,

-- Monochrome video signals (when using TV timings only)
sync => videoSync,
video => video,

n_wr => n_interface1CS or n_ioWR,
n_rd => n_interface1CS or n_ioRD,
n_int => n_int1,
regSel => cpuAddress(0),
dataIn => cpuDataOut,
dataOut => interface1DataOut,
ps2Clk => ps2Clk,
ps2Data => ps2Data
);

--
____________________________________________________________________________________
-- MEMORY READ/WRITE LOGIC GOES HERE
n_ioWR <= n_WR or n_IORQ;
n_memWR <= n_WR or n_MREQ;
n_ioRD <= n_RD or n_IORQ;
n_memRD <= n_RD or n_MREQ;
--
____________________________________________________________________________________
-- CHIP SELECTS GO HERE
n_basRomCS <= '0' when cpuAddress(15 downto 13) = "000" else '1'; --8K at
bottom of memory
n_interface1CS <= '0' when cpuAddress(7 downto 1) = "1000000" and
(n_ioWR='0' or n_ioRD = '0') else '1'; -- 2 Bytes $80-$81
n_externalRamCS<= not n_basRomCS;
--
____________________________________________________________________________________
-- BUS ISOLATION GOES HERE

cpuDataIn <=
interface1DataOut when n_interface1CS = '0' else
basRomData when n_basRomCS = '0' else
sramData when n_externalRamCS= '0' else
x"FF";

--
____________________________________________________________________________________
-- SYSTEM CLOCKS GO HERE

-- SUB-CIRCUIT CLOCK SIGNALS
serialClock <= serialClkCount(15);
process (clk)
begin
if rising_edge(clk) then

if cpuClkCount < 4 then -- 4 = 10MHz, 3 = 12.5MHz, 2=16.6MHz, 1=25MHz
cpuClkCount <= cpuClkCount + 1;
else
cpuClkCount <= (others=>'0');
end if;
if cpuClkCount < 2 then -- 2 when 10MHz, 2 when 12.5MHz, 2 when 16.6MHz, 1
when 25MHz
cpuClock <= '0';
else
cpuClock <= '1';
end if;

if sdClkCount < 49 then -- 1MHz
sdClkCount <= sdClkCount + 1;
else
sdClkCount <= (others=>'0');
end if;
if sdClkCount < 25 then
sdClock <= '0';
else
sdClock <= '1';
end if;

-- Serial clock DDS
-- 50MHz master input clock:
-- Baud Increment
-- 115200 2416
-- 38400 805
-- 19200 403
-- 9600 201
-- 4800 101
-- 2400 50
serialClkCount <= serialClkCount + 2416;
end if;
end process;


end;



On Thu, 27 Mar 2014 09:10:07 +1030, Grant Searle
<home.micros01-***@public.gmane.org> wrote:

>> Hi.
> The web hoster has temporarily blocked my site due to high CPU usage
> (can I blame you guys ;) )
>
> Anyway, I keep a full mirror of my site up to date here...
> http://zx80.netai.net/grant/
>
> And, in particular, the Multicomp page here:
> http://zx80.netai.net/grant/Multicomp/index.html
>
> Please use the main server whenever possible, but go to the above if the
> main site is down (again...)
>
> Glad to see my pages are of interest to you. I'm currently soldering up
> one of James's boards so hope to get it running on there in a >couple of
> days (bit busy at the moment so not much spare time).
>
> Any probs, please feel free to contact me.
>
> Have fun.
>
> Grant
> Main:
> http://searle.hostei.com/grant/
>
> Mirror:
> http://zx80.netai.net/grant/
>--You received this message because you are subscribed to the Google
> Groups "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send
> an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/d/optout.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
yoda
2014-03-27 15:41:16 UTC
Permalink
Hi James

What clock frequency are you running at? If you are running too high you
may not have enough address setup time for your memory. You might want to
slow down the clock and see if things work more reliably.

Dave

On Thursday, March 27, 2014 6:44:42 AM UTC-5, James Moxham (Dr_Acula) wrote:
>
> Grant, your site is popular!
>
> The following is just a little reference file - a simple external ram test
> program that doesn't need a stack so fails in a more predictable way if
> external ram is not working. Assembly, the Intel Hex for this program, and
> VHDL
>
> If using this, in the ROM folder, rename BASIC.HEX as BASIC_ORIGINAL.HEX
> or something. Copy the intel hex code into notepad and save as BASIC.HEX.
> Copy the VHDL into Quartus and compile it.
>
> This prints to a VGA display - I find that a little quicker to debug than
> using a serial terminal program.
>
> Also - I was downloading to ram but then when you cycle the power you lose
> the program. Downloading to flash is only a few seconds more. Plug the jtag
> plug into the outside socket. Change the Mode to Active Serial Programming
> and point it to microcomputer.pof
> You only need to do that once - Quartus remembers this forever.
>
> ; Ram debugging test for Grant Searle's FPGA computer - prints ABCD if
> external ram working
>
> RTS_HIGH .EQU 0D5H
> RTS_LOW .EQU 095H
>
>
> .ORG $0000
>
> ;------------------------------------------------------------------------------
> ; Reset
>
> RST00 DI ;Disable interrupts
> JP INIT ;Initialize Hardware and go
>
> ; Ram debugging test
> ; no stack and so no POP, PUSH, CALL or RET instructions can be used
> ; code is 'unrolled' into one routine
>
> INIT: LD A,RTS_LOW
> OUT ($80),A ; Initialise ACIA
> LD A,'A' ; Print an A as a test
>
> ; print routine using conout1 as a loop
> LD D,A ; store character without needing a stack/push
> conout1: IN A,($80) ; Status byte
> BIT 1,A ; Set Zero flag if still transmitting character
> JR Z,conout1 ; Loop until flag signals ready
> LD A,D ; retrieve character
> OUT ($81),A ; Output the character
>
> ; write a byte to ram, read it back and then print it
> LD HL,$200F ; ram location to write to, same as stack location in Grant's
> code
> LD A,'B' ; byte to write
> LD (HL),A ; store the byte
> LD A,'X' ; put a new byte in A and this will get overwritten
> LD A,(HL) ; read back the byte from ram
>
> ; if the value is 0-31 or >127 then won't display anything - may need to
> put in a printhex routine
> ; though in a way it does not matter, if it is not printing N then it is
> not reading from ram
>
> ; print routine using conout2 as a loop
> LD D,A ; store character without needing a stack/push
> conout2: IN A,($80) ; Status byte
> BIT 1,A ; Set Zero flag if still transmitting character
> JR Z,conout2 ; Loop until flag signals ready
> LD A,D ; retrieve character
> OUT ($81),A ; Output the character
>
> ; write to location 4000H
> LD HL,$4000 ; ram location to write to
> LD A,'C' ; byte to write
> LD (HL),A ; store the byte
> LD A,'X' ; put a new byte in A and this will get overwritten
> LD A,(HL) ; read back the byte from ram
>
> LD D,A ; store character without needing a stack/push
> conout3: IN A,($80) ; Status byte
> BIT 1,A ; Set Zero flag if still transmitting character
> JR Z,conout3 ; Loop until flag signals ready
> LD A,D ; retrieve character
> OUT ($81),A ; Output the character
>
> ; write to location E000H
> ; print routine using conout4 as a loop
>
> LD HL,$E000 ; ram location to write to
> LD A,'D' ; byte to write
> LD (HL),A ; store the byte
> LD A,'X' ; put a new byte in A and this will get overwritten
> LD A,(HL) ; read back the byte from ram
>
> LD D,A ; store character without needing a stack/push
> conout4: IN A,($80) ; Status byte
> BIT 1,A ; Set Zero flag if still transmitting character
> JR Z,conout4 ; Loop until flag signals ready
> LD A,D ; retrieve character
> OUT ($81),A ; Output the character
>
>
>
> HALT ; stop the program
>
> .END
>
>
> :20000000F3C304003E95D3803E4157DB80CB4F28FA7AD381210F203E42773E587E57DB80B8
> :20002000CB4F28FA7AD3812100403E43773E587E57DB80CB4F28FA7AD3812100E03E447793
> :0E0040003E587E57DB80CB4F28FA7AD381766C
> :00000001FF
>
>
>
> -- This file is copyright by Grant Searle 2014
> -- You are free to use this file in your own projects but must never
> charge for it nor use it without
> -- acknowledgement.
> -- Please ask permission from Grant Searle before republishing elsewhere.
> -- If you use this file or any part of it, please add an acknowledgement
> to myself and
> -- a link back to my main web site http://searle.hostei.com/grant/
> -- and to the "multicomp" page at
> http://searle.hostei.com/grant/Multicomp/index.html
> --
> -- Please check on the above web pages to see if there are any updates
> before using this file.
> -- If for some reason the page is no longer available, please search for
> "Grant Searle"
> -- on the internet to see if I have moved to another web hosting service.
> --
> -- Grant Searle
> -- eMail address available on my main web page link above.
>
> library ieee;
> use ieee.std_logic_1164.all;
> use IEEE.STD_LOGIC_ARITH.all;
> use IEEE.STD_LOGIC_UNSIGNED.all;
>
> entity Microcomputer is
> port(
> n_reset : in std_logic;
> clk : in std_logic;
>
> sramData : inout std_logic_vector(7 downto 0);
> sramAddress : out std_logic_vector(15 downto 0);
> n_sRamWE : out std_logic;
> n_sRamCS : out std_logic;
> n_sRamOE : out std_logic;
>
> rxd1 : in std_logic;
> txd1 : out std_logic;
> rts1 : out std_logic;
>
> rxd2 : in std_logic;
> txd2 : out std_logic;
> rts2 : out std_logic;
>
> videoSync : out std_logic;
> video : out std_logic;
>
> videoR0 : out std_logic;
> videoG0 : out std_logic;
> videoB0 : out std_logic;
> videoR1 : out std_logic;
> videoG1 : out std_logic;
> videoB1 : out std_logic;
> hSync : out std_logic;
> vSync : out std_logic;
>
> ps2Clk : inout std_logic;
> ps2Data : inout std_logic;
>
> sdCS : out std_logic;
> sdMOSI : out std_logic;
> sdMISO : in std_logic;
> sdSCLK : out std_logic;
> driveLED : out std_logic :='1'
> );
> end Microcomputer;
>
> architecture struct of Microcomputer is
>
> signal n_WR : std_logic;
> signal n_RD : std_logic;
> signal cpuAddress : std_logic_vector(15 downto 0);
> signal cpuDataOut : std_logic_vector(7 downto 0);
> signal cpuDataIn : std_logic_vector(7 downto 0);
>
> signal basRomData : std_logic_vector(7 downto 0);
> signal internalRam1DataOut : std_logic_vector(7 downto 0);
> signal internalRam2DataOut : std_logic_vector(7 downto 0);
> signal interface1DataOut : std_logic_vector(7 downto 0);
> signal interface2DataOut : std_logic_vector(7 downto 0);
> signal sdCardDataOut : std_logic_vector(7 downto 0);
>
> signal n_memWR : std_logic :='1';
> signal n_memRD : std_logic :='1';
>
> signal n_ioWR : std_logic :='1';
> signal n_ioRD : std_logic :='1';
>
> signal n_MREQ : std_logic :='1';
> signal n_IORQ : std_logic :='1';
>
> signal n_int1 : std_logic :='1';
> signal n_int2 : std_logic :='1';
>
> signal n_externalRamCS : std_logic :='1';
> signal n_internalRam1CS : std_logic :='1';
> signal n_internalRam2CS : std_logic :='1';
> signal n_basRomCS : std_logic :='1';
> signal n_interface1CS : std_logic :='1';
> signal n_interface2CS : std_logic :='1';
> signal n_sdCardCS : std_logic :='1';
>
> signal serialClkCount : std_logic_vector(15 downto 0);
> signal cpuClkCount : std_logic_vector(5 downto 0);
> signal sdClkCount : std_logic_vector(5 downto 0);
> signal cpuClock : std_logic;
> signal serialClock : std_logic;
> signal sdClock : std_logic;
> begin
>
> --
> ____________________________________________________________________________________
> -- CPU CHOICE GOES HERE
>
> cpu1 : entity work.t80s
> generic map(mode => 1, t2write => 1, iowait => 0)
> port map(
> reset_n => n_reset,
> clk_n => cpuClock,
> wait_n => '1',
> int_n => '1',
> nmi_n => '1',
> busrq_n => '1',
> mreq_n => n_MREQ,
> iorq_n => n_IORQ,
> rd_n => n_RD,
> wr_n => n_WR,
> a => cpuAddress,
> di => cpuDataIn,
> do => cpuDataOut);
>
> --
> ____________________________________________________________________________________
> -- ROM GOES HERE
>
> rom1 : entity work.Z80_BASIC_ROM -- 8KB BASIC
> port map(
> address => cpuAddress(12 downto 0),
> clock => clk,
> q => basRomData
> );
>
> --
> ____________________________________________________________________________________
> -- RAM GOES HERE
>
> sramAddress(15 downto 0) <= cpuAddress(15 downto 0);
> sramData <= cpuDataOut when n_memWR='0' else (others => 'Z');
> n_sRamWE <= n_memWR or n_externalRamCS;
> n_sRamOE <= n_memRD or n_externalRamCS;
> n_sRamCS <= n_externalRamCS;
>
> --
> ____________________________________________________________________________________
> -- INPUT/OUTPUT DEVICES GO HERE
> io1 : entity work.SBCTextDisplayRGB
> port map (
> n_reset => n_reset,
> clk => clk,
>
> -- RGB video signals
> hSync => hSync,
> vSync => vSync,
> videoR0 => videoR0,
> videoR1 => videoR1,
> videoG0 => videoG0,
> videoG1 => videoG1,
> videoB0 => videoB0,
> videoB1 => videoB1,
>
> -- Monochrome video signals (when using TV timings only)
> sync => videoSync,
> video => video,
>
> n_wr => n_interface1CS or n_ioWR,
> n_rd => n_interface1CS or n_ioRD,
> n_int => n_int1,
> regSel => cpuAddress(0),
> dataIn => cpuDataOut,
> dataOut => interface1DataOut,
> ps2Clk => ps2Clk,
> ps2Data => ps2Data
> );
>
> --
> ____________________________________________________________________________________
> -- MEMORY READ/WRITE LOGIC GOES HERE
> n_ioWR <= n_WR or n_IORQ;
> n_memWR <= n_WR or n_MREQ;
> n_ioRD <= n_RD or n_IORQ;
> n_memRD <= n_RD or n_MREQ;
> --
> ____________________________________________________________________________________
> -- CHIP SELECTS GO HERE
> n_basRomCS <= '0' when cpuAddress(15 downto 13) = "000" else '1'; --8K at
> bottom of memory
> n_interface1CS <= '0' when cpuAddress(7 downto 1) = "1000000" and
> (n_ioWR='0' or n_ioRD = '0') else '1'; -- 2 Bytes $80-$81
> n_externalRamCS<= not n_basRomCS;
> --
> ____________________________________________________________________________________
> -- BUS ISOLATION GOES HERE
>
> cpuDataIn <=
> interface1DataOut when n_interface1CS = '0' else
> basRomData when n_basRomCS = '0' else
> sramData when n_externalRamCS= '0' else
> x"FF";
>
> --
> ____________________________________________________________________________________
> -- SYSTEM CLOCKS GO HERE
>
> -- SUB-CIRCUIT CLOCK SIGNALS
> serialClock <= serialClkCount(15);
> process (clk)
> begin
> if rising_edge(clk) then
>
> if cpuClkCount < 4 then -- 4 = 10MHz, 3 = 12.5MHz, 2=16.6MHz, 1=25MHz
> cpuClkCount <= cpuClkCount + 1;
> else
> cpuClkCount <= (others=>'0');
> end if;
> if cpuClkCount < 2 then -- 2 when 10MHz, 2 when 12.5MHz, 2 when 16.6MHz, 1
> when 25MHz
> cpuClock <= '0';
> else
> cpuClock <= '1';
> end if;
>
> if sdClkCount < 49 then -- 1MHz
> sdClkCount <= sdClkCount + 1;
> else
> sdClkCount <= (others=>'0');
> end if;
> if sdClkCount < 25 then
> sdClock <= '0';
> else
> sdClock <= '1';
> end if;
>
> -- Serial clock DDS
> -- 50MHz master input clock:
> -- Baud Increment
> -- 115200 2416
> -- 38400 805
> -- 19200 403
> -- 9600 201
> -- 4800 101
> -- 2400 50
> serialClkCount <= serialClkCount + 2416;
> end if;
> end process;
>
>
> end;
>
>
>
> On Thu, 27 Mar 2014 09:10:07 +1030, Grant Searle <home.m...-***@public.gmane.org<javascript:>>
> wrote:
>
> Hi.
>
> The web hoster has temporarily blocked my site due to high CPU usage (can
> I blame you guys ;) )
>
> Anyway, I keep a full mirror of my site up to date here...
> http://zx80.netai.net/grant/
>
> And, in particular, the Multicomp page here:
> http://zx80.netai.net/grant/Multicomp/index.html
>
> Please use the main server whenever possible, but go to the above if the
> main site is down (again...)
>
> Glad to see my pages are of interest to you. I'm currently soldering up
> one of James's boards so hope to get it running on there in a couple of
> days (bit busy at the moment so not much spare time).
>
> Any probs, please feel free to contact me.
>
> Have fun.
>
> Grant
> Main:
> http://searle.hostei.com/grant/
>
> Mirror:
> http://zx80.netai.net/grant/
>
> --
> You received this message because you are subscribed to the Google Groups
> "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to n8vem+un...-/***@public.gmane.org <javascript:>.
> To post to this group, send email to n8...-/***@public.gmane.org <javascript:>.
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/d/optout.
>
>
>
>
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham
2014-03-29 13:57:45 UTC
Permalink
I posted off 4 boards two days ago - hopefully should be there within the
next week.

Working on the code. I still can't get BASIC to run with external ram.
Debugging at the assembly level, I think it is not the external ram, as
that seems to work fine. It is the RST 08 instruction. This is the I/O
routine Grant is using and it is in the file NASMINI.ASM in the ROMs
folder.

This code below starts with some unrolled code to print the first line of
a signon message, so that does not need a stack and there are no CALL/RET
instructions. The first line prints fine.
The second line creates a stack pointer and then there are some CALLs. The
print routine is modified from Grant's original code to bypass the RST
instructions. The second line prints fine as well.
The third line uses Grant's original RST routines, and this one fails.
Instead of printing "Test RST08" it prints "DEst BC08".

Maybe I'm not including the bit of VHDL code that handles RST routines?

Cheers, James

;==================================================================================
; Contents of this file are copyright Grant Searle
;
; You have permission to use this for NON COMMERCIAL USE ONLY
; If you wish to use it elsewhere, please include an acknowledgement to
myself.
;
; http://searle.hostei.com/grant/index.html
;
; eMail: home.micros01-***@public.gmane.org
;
; If the above don't work, please perform an Internet search to see if I
have
; updated the web page hosting service.
;
;==================================================================================

; Minimum 6850 ACIA serial I/O to run modified NASCOM Basic 4.7


RTS_HIGH .EQU 0D5H
RTS_LOW .EQU 095H

basicStarted .EQU $2000
TEMPSTACK .EQU $200F

CR .EQU 0DH
LF .EQU 0AH
CS .EQU 0CH ; Clear screen

.ORG $0000
;------------------------------------------------------------------------------
; Reset

RST00 DI ;Disable interrupts
JP INIT ;Initialize Hardware and go

;------------------------------------------------------------------------------
; TX a character over RS232

.ORG 0008H
RST08 JP TXA

;------------------------------------------------------------------------------
; RX a character over RS232 Channel A [Console], hold here until char
ready.

.ORG 0010H
RST10 JP RXA

;------------------------------------------------------------------------------
; Check serial status

.ORG 0018H
RST18 JP CKINCHAR

;------------------------------------------------------------------------------
RXA:
waitForChar: CALL CKINCHAR
JR Z, waitForChar
IN A,($81)
RET ; Char ready in A

;------------------------------------------------------------------------------
TXA: PUSH AF ; Store character
conout1: IN A,($80) ; Status byte
BIT 1,A ; Set Zero flag if still transmitting character
JR Z,conout1 ; Loop until flag signals ready
POP AF ; Retrieve character
OUT ($81),A ; Output the character
RET

;------------------------------------------------------------------------------
CKINCHAR:
IN A,($80) ; Status byte
AND $01
CP $0 ; Z flag set if no char
RET

PRINT: LD A,(HL) ; Get character
OR A ; Is it $00 ?
RET Z ; Then RETurn on terminator
RST 08H ; Print it
INC HL ; Next Character
JR PRINT ; Continue until $00
RET
;------------------------------------------------------------------------------

; print with no rst

PRINT2: LD A,(HL) ; Get character
OR A ; Is it $00 ?
RET Z ; Then RETurn on terminator
CALL OUTPUTA
INC HL
JR PRINT2
RET

OUTPUTA: LD D,A
OUTPUTA1: IN A,($80) ; Status byte
BIT 1,A ; Set Zero flag if still transmitting character
JR Z,OUTPUTA1 ; Loop until flag signals ready
LD A,D ; Retrieve character
OUT ($81),A ; Output the character
RET

;
------------------------------------------------------------------------------

INIT: ; start with code that does not need a stack, calls, ret, as
external ram may not be working

LD A,RTS_LOW
OUT ($80),A ; Initialise ACIA
LD HL,SIGNON1 ; Sign-on message

STARTPRINT: LD A,(HL)
OR A
JP Z,STARTSTACK
INC HL
; print loop - avoid calls and avoid RST 08
LD D,A ; Store character
PRINTLOOP: IN A,($80) ; Status byte
BIT 1,A ; Set Zero flag if still transmitting character
JR Z,PRINTLOOP ; Loop until flag signals ready
LD A,D ; Retrieve character
OUT ($81),A ; Output the character
JP STARTPRINT ; loop till the end of the signon character


STARTSTACK: LD HL,TEMPSTACK ; Temp stack
LD SP,HL ; Set up a temporary stack

; call print2 above, this will test the stack works
LD HL,SIGNON2
CALL PRINT2
LD HL,SIGNON3
CALL PRINT



HALT

; LD A,(basicStarted); Check the BASIC STARTED flag
; CP 'Y' ; to see if this is power-up
; JR NZ,COLDSTART ; If not BASIC started then always do cold start
; LD HL,SIGNON2 ; Cold/warm message
; CALL PRINT ; Output string
;CORW:
; CALL RXA
; AND %11011111 ; lower to uppercase
; CP 'C'
; JR NZ, CHECKWARM
; RST 08H
; LD A,$0D
; RST 08H
; LD A,$0A
; RST 08H
;COLDSTART: LD A,'Y' ; Set the BASIC STARTED flag
; LD (basicStarted),A
; JP $0100 ; Start BASIC COLD
;CHECKWARM:
; CP 'W'
; JR NZ, CORW
; RST 08H
; LD A,$0D
; RST 08H
; LD A,$0A
; RST 08H
; JP $0103 ; Start BASIC WARM
;
SIGNON1: .BYTE CS,"Z80 SBC By Grant Searle",CR,LF,0
SIGNON2: .BYTE "External stack check passed",CR,LF,0
SIGNON3: .BYTE "Test RST08",CR,LF,0

.END

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
picmaster
2014-03-27 20:17:53 UTC
Permalink
Hi Grant,

Thanks for sharing your awesome project. I'm sure lots of people have great
times reviving vintage machines on programmable logic.

I have one particular concern with the FPGA projects distribution policy on
your web-site. It says:
"Please note that you are NOT allowed to reproduce any of this page
elsewhere on the Web without my permission."

Sharing VHDL snippets here in the group is practically a violation of your
policy, even if we do it for non-commercial & hobby purposes.
Is it possible to arrange somehow this distribution policy to consider
hobby code sharing as legitimate use?

Kind regards,
picmaster


On Thursday, March 27, 2014 12:40:07 AM UTC+2, Grant Searle wrote:
>
> Hi.
>
> The web hoster has temporarily blocked my site due to high CPU usage (can
> I blame you guys ;) )
>
> Anyway, I keep a full mirror of my site up to date here...
> http://zx80.netai.net/grant/
>
> And, in particular, the Multicomp page here:
> http://zx80.netai.net/grant/Multicomp/index.html
>
> Please use the main server whenever possible, but go to the above if the
> main site is down (again...)
>
> Glad to see my pages are of interest to you. I'm currently soldering up
> one of James's boards so hope to get it running on there in a couple of
> days (bit busy at the moment so not much spare time).
>
> Any probs, please feel free to contact me.
>
> Have fun.
>
> Grant
> Main:
> http://searle.hostei.com/grant/
>
> Mirror:
> http://zx80.netai.net/grant/
>
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
Grant Searle
2014-03-27 19:12:09 UTC
Permalink
Hi James.
Soldered up the monchrome video, keyboard and RAM (I'm using a 1MBIT RAM at
the moment) with your mods (ie. 1,2,30 high) and all runs fine - I am able
to start the CP/M ROM running at 25MHz CPU - 52755 Bytes Free in BASIC.

IMPORTANT - One thing to note on your board (looking at your schematic) -
if you are intending to use pins 26,27 and 80 on the mini board then you
MUST modify the mini board and remove the "zero ohm" resistors that are
tying these to the power rails. They shouldn't actually be on the board
anyway as those are for the EP2C8 chips, but we are using EP2C5's. See the
schematic and notes on my page (on the mirror site at the moment).
Additionally, pin 81 (you aren't using this, though) is also being tied to
a power rail - again this can be removed. Haven't removed them on mine yet,
but will do soon.

...my main site was back up earlier, but I see is dead again :( Should be
back soon, but please use the mirror if dead.

All the best.

Grant

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham
2014-03-27 22:41:22 UTC
Permalink
Thanks Grant!

Very helpful re all the pins that can't be used. I'll make a note of those
- would need to see how many pins are free if adding things like a
touchscreen.

Which pins would you suggest for A16-A18?

Cheers, James


On Fri, 28 Mar 2014 05:42:09 +1030, Grant Searle
<home.micros01-***@public.gmane.org> wrote:

> Hi James.
> Soldered up the monchrome video, keyboard and RAM (I'm using a 1MBIT RAM
> at the moment) with your mods (ie. 1,2,30 high) and all runs fine - I am
> >able to start the CP/M ROM running at 25MHz CPU - 52755 Bytes Free in
> BASIC.
>
> IMPORTANT - One thing to note on your board (looking at your schematic)
> - if you are intending to use pins 26,27 and 80 on the mini board then
> you >MUST modify the mini board and remove the "zero ohm" resistors that
> are tying these to the power rails. They shouldn't actually be on the
> board >anyway as those are for the EP2C8 chips, but we are using
> EP2C5's. See the schematic and notes on my page (on the mirror site at
> the moment). >Additionally, pin 81 (you aren't using this, though) is
> also being tied to a power rail - again this can be removed. Haven't
> removed them on mine yet, but >will do soon.
>
> ...my main site was back up earlier, but I see is dead again :( Should
> be back soon, but please use the mirror if dead.
>
> All the best.
>
> Grant
> --

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
Grant Searle
2014-03-27 19:23:09 UTC
Permalink
Hi James, some other points...

Pin 88,89,90,91,22,21,18,17 on the FPGA are inputs/clock inputs only -
can't be set as outputs.
You have 88,89,90 and 91 on the touch sensor - are they inputs or outputs?

...may need to alter those assignments to ensure outputs go to IO pins.


Regards.

Grant

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
Grant Searle
2014-03-27 20:59:28 UTC
Permalink
Hi.
Yeah, that wording was not intended to stop what you are all doing here -
must think of better wording. The main reason that I have that is because
I've seen images etc. appearing elsewhere with no mention of where they
came from. I'm perfectly happy to have extracts in hobby forums such as
this as I know your all on the same wavelength and do it for interest and
fun, and I'm happy to help whenever I can. I'm more than willing to change
that statement to match (any suggestions most welcome). You all have,
however, my full permission to use, take apart etc. whatever I've got there.

Best regards.

Grant

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
Kip Koon
2014-03-28 03:18:04 UTC
Permalink
Hi Grant!

I have enjoyed your project ideas over the last few years! Keep up the great work. I see on your web page that you mentioned many FPGAs can be used for your Multicomp project. I have read much lately about FPGAs being programmed with 68000, 6809, 6800, 6502 and Z80 microprocessor cores and I’m sure other processor cores have been programmed into FPGAs as well. A university in California I believe has used a 68000 VHDL core in the past to teach students how to program and use FPGA chips.

I read a web page recently called “How to Build an 8-Bit Computer” at

http://www.instructables.com/id/How-to-Build-an-8-Bit-Computer/?ALLSTEPS

which gives general guidelines on how to design a simple 8-bit microprocessor. I was very intrigued so I started to design up a PCB in Eagle to do that very project which was starting to get quite large when a friend suggested using an FPGA. Well, I had no idea how to do that so when I was recently reintroduced by this very email thread to your Multicomp project I looked at it again and I must say that I am very impressed with your talents.

Would you be interested in writing up a page on how to actually design an FPGA based 8-bit microprocessor of some type preferably 6809 or 6309 related in some way and maybe suggest an excellent text describing in detail step by step how to actually go about creating such microprocessors? I for one would be very interested in reading about that. I have tried to scour the internet looking for older texts on the subject and found a few, but most of them are general in nature. I understand that many Computer Digital Engineering courses have groups of students design their very own microprocessors and implement them in an FPGA. This subject has really attracted my attention lately and I would like to eventually take the 6809 or 6309 if a core becomes available and create an FPGA with all the registers both visible and internal available on the I/O pins so I can create an old style front panel like the DEC PDP 11 Computer systems of yesteryear. :) That is my dream anyway. It is a huge project though and there may not be an FPGA with enough pins to do this so I might have to relegate myself to a simple microprocessor design which is fine since this is a learning project anyway. Does anyone have any ideas along this line? Thank you all in advance. Take care my friends.

Kip



From: n8vem-/***@public.gmane.org [mailto:n8vem-/***@public.gmane.org] On Behalf Of Grant Searle
Sent: Thursday, March 27, 2014 4:59 PM
To: n8vem-/***@public.gmane.org
Subject: [N8VEM: 17633] Re: Vintage + modern = fun



Hi.
Yeah, that wording was not intended to stop what you are all doing here - must think of better wording. The main reason that I have that is because I've seen images etc. appearing elsewhere with no mention of where they came from. I'm perfectly happy to have extracts in hobby forums such as this as I know your all on the same wavelength and do it for interest and fun, and I'm happy to help whenever I can. I'm more than willing to change that statement to match (any suggestions most welcome). You all have, however, my full permission to use, take apart etc. whatever I've got there.

Best regards.

Grant

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
Grant Searle
2014-03-29 14:33:42 UTC
Permalink
Hi.
RST routines are nothing more than shortened "CALL" operators.

Very strange, as the full CP/M BASIC ROM (identical BASIC) runs on my board
that you sent perfectly. I'll try the version that you use shortly and get
back.

Regards.

Grant

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
Grant Searle
2014-03-29 15:32:13 UTC
Permalink
Yep... definitely works for me on your board (external RAM, Z80, Monochrome
PAL output, 80x25)...<https://lh4.googleusercontent.com/-ycOygAJc-CY/Uzbm2YeoKoI/AAAAAAAAABc/Rvn0U95CeU4/s1600/hijames.jpg>


<https://lh4.googleusercontent.com/-ycOygAJc-CY/Uzbm2YeoKoI/AAAAAAAAABc/Rvn0U95CeU4/s1600/hijames.jpg>

<https://lh4.googleusercontent.com/-ycOygAJc-CY/Uzbm2YeoKoI/AAAAAAAAABc/Rvn0U95CeU4/s1600/hijames.jpg>

My VHDL is here...


-- This file is copyright by Grant Searle 2014
-- You are free to use this file in your own projects but must never charge
for it nor use it without
-- acknowledgement.
-- Please ask permission from Grant Searle before republishing elsewhere.
-- If you use this file or any part of it, please add an acknowledgement to
myself and
-- a link back to my main web site http://searle.hostei.com/grant/
-- and to the "multicomp" page at
http://searle.hostei.com/grant/Multicomp/index.html
--
-- Please check on the above web pages to see if there are any updates
before using this file.
-- If for some reason the page is no longer available, please search for
"Grant Searle"
-- on the internet to see if I have moved to another web hosting service.
--
-- Grant Searle
-- eMail address available on my main web page link above.

library ieee;
use ieee.std_logic_1164.all;
use IEEE.STD_LOGIC_ARITH.all;
use IEEE.STD_LOGIC_UNSIGNED.all;

entity Microcomputer is
port(
n_reset : in std_logic;
clk : in std_logic;

sramData : inout std_logic_vector(7 downto 0);
sramAddress : out std_logic_vector(15 downto 0);
n_sRamWE : out std_logic;
n_sRamCS : out std_logic;
n_sRamOE : out std_logic;

rxd1 : in std_logic;
txd1 : out std_logic;
rts1 : out std_logic;

rxd2 : in std_logic;
txd2 : out std_logic;
rts2 : out std_logic;

videoSync : out std_logic;
video : out std_logic;

videoR0 : out std_logic;
videoG0 : out std_logic;
videoB0 : out std_logic;
videoR1 : out std_logic;
videoG1 : out std_logic;
videoB1 : out std_logic;
hSync : out std_logic;
vSync : out std_logic;

ps2Clk : inout std_logic;
ps2Data : inout std_logic;

sdCS : out std_logic;
sdMOSI : out std_logic;
sdMISO : in std_logic;
sdSCLK : out std_logic;
driveLED : out std_logic :='1'
);
end Microcomputer;

architecture struct of Microcomputer is

signal n_WR : std_logic;
signal n_RD : std_logic;
signal cpuAddress : std_logic_vector(15 downto 0);
signal cpuDataOut : std_logic_vector(7 downto 0);
signal cpuDataIn : std_logic_vector(7 downto 0);

signal basRomData : std_logic_vector(7 downto 0);
signal internalRam1DataOut : std_logic_vector(7 downto 0);
signal internalRam2DataOut : std_logic_vector(7 downto 0);
signal interface1DataOut : std_logic_vector(7 downto 0);
signal interface2DataOut : std_logic_vector(7 downto 0);
signal sdCardDataOut : std_logic_vector(7 downto 0);

signal n_memWR : std_logic :='1';
signal n_memRD : std_logic :='1';

signal n_ioWR : std_logic :='1';
signal n_ioRD : std_logic :='1';

signal n_MREQ : std_logic :='1';
signal n_IORQ : std_logic :='1';

signal n_int1 : std_logic :='1';
signal n_int2 : std_logic :='1';

signal n_externalRamCS : std_logic :='1';
signal n_internalRam1CS : std_logic :='1';
signal n_internalRam2CS : std_logic :='1';
signal n_basRomCS : std_logic :='1';
signal n_interface1CS : std_logic :='1';
signal n_interface2CS : std_logic :='1';
signal n_sdCardCS : std_logic :='1';

signal serialClkCount : std_logic_vector(15 downto 0);
signal cpuClkCount : std_logic_vector(5 downto 0);
signal sdClkCount : std_logic_vector(5 downto 0);

signal cpuClock : std_logic;
signal serialClock : std_logic;
signal sdClock : std_logic;

begin
--
____________________________________________________________________________________
cpu1 : entity work.t80s
generic map(mode => 1, t2write => 1, iowait => 0)
port map(
reset_n => n_reset,
clk_n => cpuClock,
wait_n => '1',
int_n => '1',
nmi_n => '1',
busrq_n => '1',
mreq_n => n_MREQ,
iorq_n => n_IORQ,
rd_n => n_RD,
wr_n => n_WR,
a => cpuAddress,
di => cpuDataIn,
do => cpuDataOut);

--
____________________________________________________________________________________
rom1 : entity work.Z80_BASIC_ROM -- 8KB BASIC
port map(
address => cpuAddress(12 downto 0),
clock => clk,
q => basRomData
);

--
____________________________________________________________________________________
sramAddress(15 downto 0) <= cpuAddress(15 downto 0);
sramData <= cpuDataOut when n_memWR='0' else (others => 'Z');
n_sRamWE <= n_memWR or n_externalRamCS;
n_sRamOE <= n_memRD or n_externalRamCS;
n_sRamCS <= n_externalRamCS;

--
____________________________________________________________________________________
io1 : entity work.SBCTextDisplayRGB
generic map(
CLOCKS_PER_PIXEL => 3,
CLOCKS_PER_SCANLINE => 3200,
DISPLAY_TOP_SCANLINE => 65,
VERT_SCANLINES => 312,
VERT_PIXEL_SCANLINES => 1,
VSYNC_SCANLINES => 4,
HSYNC_CLOCKS => 235,
DISPLAY_LEFT_CLOCK => 850
)
port map (
n_reset => n_reset,
clk => clk,

-- RGB video signals
hSync => hSync,
vSync => vSync,
videoR0 => videoR0,
videoR1 => videoR1,
videoG0 => videoG0,
videoG1 => videoG1,
videoB0 => videoB0,
videoB1 => videoB1,

-- Monochrome video signals (when using TV timings only)
sync => videoSync,
video => video,

n_wr => n_interface1CS or n_ioWR,
n_rd => n_interface1CS or n_ioRD,
n_int => n_int1,
regSel => cpuAddress(0),
dataIn => cpuDataOut,
dataOut => interface1DataOut,
ps2Clk => ps2Clk,
ps2Data => ps2Data
);

--
____________________________________________________________________________________
n_ioWR <= n_WR or n_IORQ;
n_memWR <= n_WR or n_MREQ;
n_ioRD <= n_RD or n_IORQ;
n_memRD <= n_RD or n_MREQ;

--
____________________________________________________________________________________
n_basRomCS <= '0' when cpuAddress(15 downto 13) = "000" else '1'; --8K at
bottom of memory
n_interface1CS <= '0' when cpuAddress(7 downto 1) = "1000000" and
(n_ioWR='0' or n_ioRD = '0') else '1'; -- 2 Bytes $80-$81
n_interface2CS <= '0' when cpuAddress(7 downto 1) = "1000001" and
(n_ioWR='0' or n_ioRD = '0') else '1'; -- 2 Bytes $82-$83
n_sdCardCS <= '0' when cpuAddress(7 downto 3) = "10001" and (n_ioWR='0' or
n_ioRD = '0') else '1'; -- 8 Bytes $88-$8F
n_externalRamCS<= not n_basRomCS;
--
____________________________________________________________________________________
cpuDataIn <=
interface1DataOut when n_interface1CS = '0' else
interface2DataOut when n_interface2CS = '0' else
sdCardDataOut when n_sdCardCS = '0' else
basRomData when n_basRomCS = '0' else
internalRam1DataOut when n_internalRam1CS= '0' else
sramData when n_externalRamCS= '0' else
x"FF";

--
____________________________________________________________________________________
-- SUB-CIRCUIT CLOCK SIGNALS
serialClock <= serialClkCount(15);
process (clk)
begin
if rising_edge(clk) then

if cpuClkCount < 4 then -- 4 = 10MHz, 3 = 12.5MHz, 2=16.6MHz, 1=25MHz
cpuClkCount <= cpuClkCount + 1;
else
cpuClkCount <= (others=>'0');
end if;
if cpuClkCount < 2 then -- 2 when 10MHz, 2 when 12.5MHz, 2 when 16.6MHz, 1
when 25MHz
cpuClock <= '0';
else
cpuClock <= '1';
end if;

if sdClkCount < 49 then -- 1MHz
sdClkCount <= sdClkCount + 1;
else
sdClkCount <= (others=>'0');
end if;
if sdClkCount < 25 then
sdClock <= '0';
else
sdClock <= '1';
end if;

-- Serial clock DDS
-- 50MHz master input clock:
-- Baud Increment
-- 115200 2416
-- 38400 805
-- 19200 403
-- 9600 201
-- 4800 101
-- 2400 50
serialClkCount <= serialClkCount + 2416;
end if;
end process;

end;

<https://lh4.googleusercontent.com/-ycOygAJc-CY/Uzbm2YeoKoI/AAAAAAAAABc/Rvn0U95CeU4/s1600/hijames.jpg>

Regards.

Grant

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
Grant Searle
2014-03-29 16:14:48 UTC
Permalink
Hi.
The Multicomp CP/M (on SD card) also works perfectly on James's board :)

<https://lh5.googleusercontent.com/-AwZTpYmX_Xo/UzbxLvncXqI/AAAAAAAAAB0/fLU0wiYCC2o/s1600/jamesCPM2.jpg>

<https://lh6.googleusercontent.com/-_40-yMKzuAA/UzbxIUpimcI/AAAAAAAAABs/s8fmbjPHM5g/s1600/jamesCPM1.jpg>
Regards.

Grant

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
Kip Koon
2014-03-30 02:42:03 UTC
Permalink
Hi Guys!

Grant, your setup looks great! I can hardly wait to get a board from James. Congratulations on getting CP/M running on what has to be the smallest Z80 based platform ever built!

James, do you have me on the list to receive one of these FPGA Mini-Development PCB compatible PCBs?

I have already successfully compiled my 6809 Multicomp VHDL on Quartus II as well as a Z80 Multicomp VHDL since CP/M has been brought online. I hope it will all run successfully on the interface PCBs I designed for the FPGA mini-development PCB I have on the way. I plan to try externalizing the 8KB Basic Interpreter so I can hack into it and try some other things as well. I’d like to see the print using statement put back into the Extended Basic rom image as well as many other statements.

Since my 6809 assembly skills have been on the shelf for several decades except for what little I did when I breadboarded Grant’s 6-Chip 6809 Computer, my ideas may not see fruition for quite a while yet. Although I studied the four Color Computer Basics Unraveled Series and printed them out to make studying easier and gained some understanding of what’s going on, much of the source code seems kind of convoluted and disorganized to me. It will take a whole lot of further study and renaming of the 6809 disassembler’s labels to be able to merge the source code for HDB-DOS DW3 in with Grant’s version of Extended Graphicless Basic.

I’d like to put floppy drives as well as hard drives on this thing in addition to the SD Card for storage. I’d like to see someone put back in all the graphic and color commands as well. Also how about an 8-bit ADC to give this thing sound and an AY-3-8910 in VHDL for music and special effects. I found the VHDL code for the AY-3-8910 40-pin chip last night on opencores.org. I think I will try to find some VHDL for analog to digital and digital to analog controllers as well. I hope the AY-3-8910 VHDL code fits once the external 8KB Basic Interpreter is operational. I believe I have really gotten bit by the VHDL bug huh!

I say Graphicless in my version of the name because I had so many versions of 6809 Basic interpreters I was working with that it made identification of Grant’s version easier. Someday I would like to see the 6809 Multicomp version upgraded to communicate with Drivewire 4 server running on my PC to get access to floppy and hard drive image files. With that capability and the storage capability of the SD Card, some very interesting things can happen.

A few nights ago I drew up three PCBs to interface with the FPGA mini-development board to bring my fabrication costs way down. I have included everything that Grant designed onto three PCBs. In addition to the 128KB static ram chip I included a 512KB static ram chip on the PCB to give me a choice. See I have both chips available, but until an MMU in VHDL is designed I saw no reason to install a 512KB chip yet as I have so few of them and many of the 128KB chips. I will be using the 512KB static ram chips I have in a Coco 3 product I’m designing as I have two customers for it already. When a decision is made on the as yet unused address pins on the AS6C4008 512KB Static Ram chip, I will finish the ram PCB and have all of them submitted for fabrication. Heck I might just have separate ram PCBs – one for the 128KB chip and the other for the 512KB chip. That would make things cheaper in the beginning anyway.

I will be studying the datasheet of the FPGA chip we are using and may assign some I/O pins myself once my hardware gets here if a decision has not been made by then. When all of this is working I will of course be posting some pictures of my version of the setup to this email list and my Wiki page on cocopedia.com. In the meantime, I collected a bunch of VHDL code last night from opencores.org so I can start studying working VHDL code and start experimenting with some ideas of my own. I grabbed VHDL code for the 6800, 6809, 6309, 68HC05, 68HC08, 68HC11, 68000 and even the Z80 and 6502 cpu cores as well as a bunch of other types of VHDL code including a very capable VGA controller. Once I get the rom image working in an external eprom, I what to start seriously learning all this stuff. It will be a lot cheaper than designing and fabricating all the PCBs I have been working on designing.

Many thanks definitely go to Grant Searle for introducing to all of us VHDL, FPGAs and giving us all a very inexpensive platform to learn on. It really makes a big difference to me to be able to have actual hardware to experiment with! Thanks a bunch Grant! We are all indebted to you for all your efforts. I’ll keep you guys posted on further developments. I can see many new things happening for our little Multicomp projects coming in the future. Have Fun Multicomping!

Kip



From: n8vem-/***@public.gmane.org [mailto:n8vem-/***@public.gmane.org] On Behalf Of Grant Searle
Sent: Saturday, March 29, 2014 12:15 PM
To: n8vem-/***@public.gmane.org
Subject: [N8VEM: 17641] Re: Vintage + modern = fun



Hi.
The Multicomp CP/M (on SD card) also works perfectly on James's board :)

<https://lh5.googleusercontent.com/-AwZTpYmX_Xo/UzbxLvncXqI/AAAAAAAAAB0/fLU0wiYCC2o/s1600/jamesCPM2.jpg>

<https://lh6.googleusercontent.com/-_40-yMKzuAA/UzbxIUpimcI/AAAAAAAAABs/s8fmbjPHM5g/s1600/jamesCPM1.jpg>

Regards.

Grant

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham (Dr_Acula)
2014-03-30 05:23:32 UTC
Permalink
@Kip - yes I have a couple of boards left - can you send me your postal
address, email to moxhamj at internode.on.net

Re building boards, if you are building some, the more the better! My board
was just a proof of concept, mainly to check you could treat the FPGA board
as a large IC and plug it into another PCB.

There are so many things you can add to a PCB. I've been looking at
Opencores and there are some great things you could add. An Ethernet
connection. A USB hub. Some of the Z80 peripherals like a CTC.

Lots to dream about thanks to Grant! :)

- James Moxham


On Sunday, 30 March 2014 13:12:03 UTC+10:30, computerdoc wrote:

> Hi Guys!
>
> Grant, your setup looks great! I can hardly wait to get a board from
> James. Congratulations on getting CP/M running on what has to be the
> smallest Z80 based platform ever built!
>
> James, do you have me on the list to receive one of these FPGA
> Mini-Development PCB compatible PCBs?
>
> I have already successfully compiled my 6809 Multicomp VHDL on Quartus II
> as well as a Z80 Multicomp VHDL since CP/M has been brought online. I hope
> it will all run successfully on the interface PCBs I designed for the FPGA
> mini-development PCB I have on the way. I plan to try externalizing the
> 8KB Basic Interpreter so I can hack into it and try some other things as
> well. I’d like to see the print using statement put back into the Extended
> Basic rom image as well as many other statements.
>
> Since my 6809 assembly skills have been on the shelf for several decades
> except for what little I did when I breadboarded Grant’s 6-Chip 6809
> Computer, my ideas may not see fruition for quite a while yet. Although I
> studied the four Color Computer Basics Unraveled Series and printed them
> out to make studying easier and gained some understanding of what’s going
> on, much of the source code seems kind of convoluted and disorganized to
> me. It will take a whole lot of further study and renaming of the 6809
> disassembler’s labels to be able to merge the source code for HDB-DOS DW3
> in with Grant’s version of Extended Graphicless Basic.
>
> I’d like to put floppy drives as well as hard drives on this thing in
> addition to the SD Card for storage. I’d like to see someone put back in
> all the graphic and color commands as well. Also how about an 8-bit ADC to
> give this thing sound and an AY-3-8910 in VHDL for music and special
> effects. I found the VHDL code for the AY-3-8910 40-pin chip last night on
> opencores.org. I think I will try to find some VHDL for analog to
> digital and digital to analog controllers as well. I hope the AY-3-8910
> VHDL code fits once the external 8KB Basic Interpreter is operational. I
> believe I have really gotten bit by the VHDL bug huh!
>
> I say Graphicless in my version of the name because I had so many versions
> of 6809 Basic interpreters I was working with that it made identification
> of Grant’s version easier. Someday I would like to see the 6809 Multicomp
> version upgraded to communicate with Drivewire 4 server running on my PC to
> get access to floppy and hard drive image files. With that capability and
> the storage capability of the SD Card, some very interesting things can
> happen.
>
> A few nights ago I drew up three PCBs to interface with the FPGA
> mini-development board to bring my fabrication costs way down. I have
> included everything that Grant designed onto three PCBs. In addition to
> the 128KB static ram chip I included a 512KB static ram chip on the PCB to
> give me a choice. See I have both chips available, but until an MMU in
> VHDL is designed I saw no reason to install a 512KB chip yet as I have so
> few of them and many of the 128KB chips. I will be using the 512KB static
> ram chips I have in a Coco 3 product I’m designing as I have two customers
> for it already. When a decision is made on the as yet unused address pins
> on the AS6C4008 512KB Static Ram chip, I will finish the ram PCB and have
> all of them submitted for fabrication. Heck I might just have separate ram
> PCBs – one for the 128KB chip and the other for the 512KB chip. That would
> make things cheaper in the beginning anyway.
>
> I will be studying the datasheet of the FPGA chip we are using and may
> assign some I/O pins myself once my hardware gets here if a decision has
> not been made by then. When all of this is working I will of course be
> posting some pictures of my version of the setup to this email list and my
> Wiki page on cocopedia.com. In the meantime, I collected a bunch of VHDL
> code last night from opencores.org so I can start studying working VHDL
> code and start experimenting with some ideas of my own. I grabbed VHDL
> code for the 6800, 6809, 6309, 68HC05, 68HC08, 68HC11, 68000 and even the
> Z80 and 6502 cpu cores as well as a bunch of other types of VHDL code
> including a very capable VGA controller. Once I get the rom image working
> in an external eprom, I what to start seriously learning all this stuff.
> It will be a lot cheaper than designing and fabricating all the PCBs I have
> been working on designing.
>
> Many thanks definitely go to Grant Searle for introducing to all of us
> VHDL, FPGAs and giving us all a very inexpensive platform to learn on. It
> really makes a big difference to me to be able to have actual hardware to
> experiment with! Thanks a bunch Grant! We are all indebted to you for all
> your efforts. I’ll keep you guys posted on further developments. I can
> see many new things happening for our little Multicomp projects coming in
> the future. Have Fun Multicomping!
>
> Kip
>
>
>
> *From:* n8...-/***@public.gmane.org <javascript:> [mailto:
> n8...-/***@public.gmane.org <javascript:>] *On Behalf Of *Grant Searle
> *Sent:* Saturday, March 29, 2014 12:15 PM
> *To:* n8...-/***@public.gmane.org <javascript:>
> *Subject:* [N8VEM: 17641] Re: Vintage + modern = fun
>
>
>
> Hi.
> The Multicomp CP/M (on SD card) also works perfectly on James's board :)
>
>
> <https://lh5.googleusercontent.com/-AwZTpYmX_Xo/UzbxLvncXqI/AAAAAAAAAB0/fLU0wiYCC2o/s1600/jamesCPM2.jpg>
>
>
> <https://lh6.googleusercontent.com/-_40-yMKzuAA/UzbxIUpimcI/AAAAAAAAABs/s8fmbjPHM5g/s1600/jamesCPM1.jpg>
>
> Regards.
>
> Grant
>
> --
> You received this message because you are subscribed to the Google Groups
> "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to n8vem+un...-/***@public.gmane.org <javascript:>.
> To post to this group, send email to n8...-/***@public.gmane.org <javascript:>.
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/d/optout.
>

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
James Moxham
2014-03-30 03:20:43 UTC
Permalink
Fantastic news Grant!

Good to hear CP/M works too and the SD card.


I don't know what is wrong with my board. The only two differences are
that I am using a 512k chip, and my video code is different as I am using
a VGA display (code below).

I'll do some more experiements. Try with serial instead etc. It seems to
be the RST instruction is the problem.

But this is great news about your board.

Big picture, with more people involved we should be able to leverage off a
lot of N8VEM code.

I'll have a think about a new board design with FPGA sitting underneath,
and with all the corrections we discussed.

Cheers, James


io1 : entity work.SBCTextDisplayRGB
port map (
n_reset => n_reset,
clk => clk,

-- RGB video signals
hSync => hSync,
vSync => vSync,
videoR0 => videoR0,
videoR1 => videoR1,
videoG0 => videoG0,
videoG1 => videoG1,
videoB0 => videoB0,
videoB1 => videoB1,

-- Monochrome video signals (when using TV timings only)
sync => videoSync,
video => video,

n_wr => n_interface1CS or n_ioWR,
n_rd => n_interface1CS or n_ioRD,
n_int => n_int1,
regSel => cpuAddress(0),
dataIn => cpuDataOut,
dataOut => interface1DataOut,
ps2Clk => ps2Clk,
ps2Data => ps2Data
);


On Sun, 30 Mar 2014 02:44:48 +1030, Grant Searle
<home.micros01-***@public.gmane.org> wrote:

>
> Hi.
> The Multicomp CP/M (on SD card) also works perfectly on James's board :)
>
>
>
>
>
> Regards.
>
> Grant
> --You received this message because you are subscribed to the Google
> Groups "N8VEM" group.
> To unsubscribe from this group and stop receiving emails from it, send
> an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
> Visit this group at http://groups.google.com/group/n8vem.
> For more options, visit https://groups.google.com/d/optout.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
Grant Searle
2014-03-30 08:52:06 UTC
Permalink
>
> Aaaw.... thanks all for your kind comments, your encouragement keeps me
> going :)


Hope I don't give you too many late nights (or burnt fingers) hacking away
there !

I'll dig out other connectors and MAX232 (or MAX202 and equiv) chips and
give the rest of the board a work-out (serial ports and VGA).

James, you may want to have a close inspection of the mini board that you
have to ensure all pins of the FPGA are properly soldered - you may have a
floating address line. One of my boards had a couple of pins un-soldered
and that threw me for a while.

I don't have a touch screen (yet!) but we may have to see what pins are
suitable for that (see earlier thread). In worse-case, may have to
double-up on the pin designations but there may already be enough,
especially if the dedicated inputs are assigned to input pins on the FPGA,
freeing up outputs to the output pins.

Anyway, I'll see if I get time this evening (UK time).

Regards.

Grant

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
Kip Koon
2014-03-31 01:00:22 UTC
Permalink
Hi Grant!

Late nights are my specialty! :) I get more work done that way. Nobody to bother me or interrupt my thinking. I love it!

Kip



From: n8vem-/***@public.gmane.org [mailto:n8vem-/***@public.gmane.org] On Behalf Of Grant Searle
Sent: Sunday, March 30, 2014 4:52 AM
To: n8vem-/***@public.gmane.org
Subject: [N8VEM: 17652] Re: Vintage + modern = fun



Aaaw.... thanks all for your kind comments, your encouragement keeps me going :)



Hope I don't give you too many late nights (or burnt fingers) hacking away there !



I'll dig out other connectors and MAX232 (or MAX202 and equiv) chips and give the rest of the board a work-out (serial ports and VGA).



James, you may want to have a close inspection of the mini board that you have to ensure all pins of the FPGA are properly soldered - you may have a floating address line. One of my boards had a couple of pins un-soldered and that threw me for a while.



I don't have a touch screen (yet!) but we may have to see what pins are suitable for that (see earlier thread). In worse-case, may have to double-up on the pin designations but there may already be enough, especially if the dedicated inputs are assigned to input pins on the FPGA, freeing up outputs to the output pins.



Anyway, I'll see if I get time this evening (UK time).



Regards.



Grant

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.

--
You received this message because you are subscribed to the Google Groups "N8VEM" group.
To unsubscribe from this group and stop receiving emails from it, send an email to n8vem+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
To post to this group, send email to n8vem-/JYPxA39Uh5TLH3MbocFF+G/***@public.gmane.org
Visit this group at http://groups.google.com/group/n8vem.
For more options, visit https://groups.google.com/d/optout.
Loading...