Hi James
What clock frequency are you running at? If you are running too high you
may not have enough address setup time for your memory. You might want to
slow down the clock and see if things work more reliably.
Dave
On Thursday, March 27, 2014 6:44:42 AM UTC-5, James Moxham (Dr_Acula) wrote:
>
> Grant, your site is popular!
>
> The following is just a little reference file - a simple external ram test
> program that doesn't need a stack so fails in a more predictable way if
> external ram is not working. Assembly, the Intel Hex for this program, and
> VHDL
>
> If using this, in the ROM folder, rename BASIC.HEX as BASIC_ORIGINAL.HEX
> or something. Copy the intel hex code into notepad and save as BASIC.HEX.
> Copy the VHDL into Quartus and compile it.
>
> This prints to a VGA display - I find that a little quicker to debug than
> using a serial terminal program.
>
> Also - I was downloading to ram but then when you cycle the power you lose
> the program. Downloading to flash is only a few seconds more. Plug the jtag
> plug into the outside socket. Change the Mode to Active Serial Programming
> and point it to microcomputer.pof
> You only need to do that once - Quartus remembers this forever.
>
> ; Ram debugging test for Grant Searle's FPGA computer - prints ABCD if
> external ram working
>
> RTS_HIGH .EQU 0D5H
> RTS_LOW .EQU 095H
>
>
> .ORG $0000
>
> ;------------------------------------------------------------------------------
> ; Reset
>
> RST00 DI ;Disable interrupts
> JP INIT ;Initialize Hardware and go
>
> ; Ram debugging test
> ; no stack and so no POP, PUSH, CALL or RET instructions can be used
> ; code is 'unrolled' into one routine
>
> INIT: LD A,RTS_LOW
> OUT ($80),A ; Initialise ACIA
> LD A,'A' ; Print an A as a test
>
> ; print routine using conout1 as a loop
> LD D,A ; store character without needing a stack/push
> conout1: IN A,($80) ; Status byte
> BIT 1,A ; Set Zero flag if still transmitting character
> JR Z,conout1 ; Loop until flag signals ready
> LD A,D ; retrieve character
> OUT ($81),A ; Output the character
>
> ; write a byte to ram, read it back and then print it
> LD HL,$200F ; ram location to write to, same as stack location in Grant's
> code
> LD A,'B' ; byte to write
> LD (HL),A ; store the byte
> LD A,'X' ; put a new byte in A and this will get overwritten
> LD A,(HL) ; read back the byte from ram
>
> ; if the value is 0-31 or >127 then won't display anything - may need to
> put in a printhex routine
> ; though in a way it does not matter, if it is not printing N then it is
> not reading from ram
>
> ; print routine using conout2 as a loop
> LD D,A ; store character without needing a stack/push
> conout2: IN A,($80) ; Status byte
> BIT 1,A ; Set Zero flag if still transmitting character
> JR Z,conout2 ; Loop until flag signals ready
> LD A,D ; retrieve character
> OUT ($81),A ; Output the character
>
> ; write to location 4000H
> LD HL,$4000 ; ram location to write to
> LD A,'C' ; byte to write
> LD (HL),A ; store the byte
> LD A,'X' ; put a new byte in A and this will get overwritten
> LD A,(HL) ; read back the byte from ram
>
> LD D,A ; store character without needing a stack/push
> conout3: IN A,($80) ; Status byte
> BIT 1,A ; Set Zero flag if still transmitting character
> JR Z,conout3 ; Loop until flag signals ready
> LD A,D ; retrieve character
> OUT ($81),A ; Output the character
>
> ; write to location E000H
> ; print routine using conout4 as a loop
>
> LD HL,$E000 ; ram location to write to
> LD A,'D' ; byte to write
> LD (HL),A ; store the byte
> LD A,'X' ; put a new byte in A and this will get overwritten
> LD A,(HL) ; read back the byte from ram
>
> LD D,A ; store character without needing a stack/push
> conout4: IN A,($80) ; Status byte
> BIT 1,A ; Set Zero flag if still transmitting character
> JR Z,conout4 ; Loop until flag signals ready
> LD A,D ; retrieve character
> OUT ($81),A ; Output the character
>
>
>
> HALT ; stop the program
>
> .END
>
>
> :20000000F3C304003E95D3803E4157DB80CB4F28FA7AD381210F203E42773E587E57DB80B8
> :20002000CB4F28FA7AD3812100403E43773E587E57DB80CB4F28FA7AD3812100E03E447793
> :0E0040003E587E57DB80CB4F28FA7AD381766C
> :00000001FF
>
>
>
> -- This file is copyright by Grant Searle 2014
> -- You are free to use this file in your own projects but must never
> charge for it nor use it without
> -- acknowledgement.
> -- Please ask permission from Grant Searle before republishing elsewhere.
> -- If you use this file or any part of it, please add an acknowledgement
> to myself and
> -- a link back to my main web site http://searle.hostei.com/grant/
> -- and to the "multicomp" page at
> http://searle.hostei.com/grant/Multicomp/index.html
> --
> -- Please check on the above web pages to see if there are any updates
> before using this file.
> -- If for some reason the page is no longer available, please search for
> "Grant Searle"
> -- on the internet to see if I have moved to another web hosting service.
> --
> -- Grant Searle
> -- eMail address available on my main web page link above.
>
> library ieee;
> use ieee.std_logic_1164.all;
> use IEEE.STD_LOGIC_ARITH.all;
> use IEEE.STD_LOGIC_UNSIGNED.all;
>
> entity Microcomputer is
> port(
> n_reset : in std_logic;
> clk : in std_logic;
>
> sramData : inout std_logic_vector(7 downto 0);
> sramAddress : out std_logic_vector(15 downto 0);
> n_sRamWE : out std_logic;
> n_sRamCS : out std_logic;
> n_sRamOE : out std_logic;
>
> rxd1 : in std_logic;
> txd1 : out std_logic;
> rts1 : out std_logic;
>
> rxd2 : in std_logic;
> txd2 : out std_logic;
> rts2 : out std_logic;
>
> videoSync : out std_logic;
> video : out std_logic;
>
> videoR0 : out std_logic;
> videoG0 : out std_logic;
> videoB0 : out std_logic;
> videoR1 : out std_logic;
> videoG1 : out std_logic;
> videoB1 : out std_logic;
> hSync : out std_logic;
> vSync : out std_logic;
>
> ps2Clk : inout std_logic;
> ps2Data : inout std_logic;
>
> sdCS : out std_logic;
> sdMOSI : out std_logic;
> sdMISO : in std_logic;
> sdSCLK : out std_logic;
> driveLED : out std_logic :='1'
> );
> end Microcomputer;
>
> architecture struct of Microcomputer is
>
> signal n_WR : std_logic;
> signal n_RD : std_logic;
> signal cpuAddress : std_logic_vector(15 downto 0);
> signal cpuDataOut : std_logic_vector(7 downto 0);
> signal cpuDataIn : std_logic_vector(7 downto 0);
>
> signal basRomData : std_logic_vector(7 downto 0);
> signal internalRam1DataOut : std_logic_vector(7 downto 0);
> signal internalRam2DataOut : std_logic_vector(7 downto 0);
> signal interface1DataOut : std_logic_vector(7 downto 0);
> signal interface2DataOut : std_logic_vector(7 downto 0);
> signal sdCardDataOut : std_logic_vector(7 downto 0);
>
> signal n_memWR : std_logic :='1';
> signal n_memRD : std_logic :='1';
>
> signal n_ioWR : std_logic :='1';
> signal n_ioRD : std_logic :='1';
>
> signal n_MREQ : std_logic :='1';
> signal n_IORQ : std_logic :='1';
>
> signal n_int1 : std_logic :='1';
> signal n_int2 : std_logic :='1';
>
> signal n_externalRamCS : std_logic :='1';
> signal n_internalRam1CS : std_logic :='1';
> signal n_internalRam2CS : std_logic :='1';
> signal n_basRomCS : std_logic :='1';
> signal n_interface1CS : std_logic :='1';
> signal n_interface2CS : std_logic :='1';
> signal n_sdCardCS : std_logic :='1';
>
> signal serialClkCount : std_logic_vector(15 downto 0);
> signal cpuClkCount : std_logic_vector(5 downto 0);
> signal sdClkCount : std_logic_vector(5 downto 0);
> signal cpuClock : std_logic;
> signal serialClock : std_logic;
> signal sdClock : std_logic;
> begin
>
> --
> ____________________________________________________________________________________
> -- CPU CHOICE GOES HERE
>
> cpu1 : entity work.t80s
> generic map(mode => 1, t2write => 1, iowait => 0)
> port map(
> reset_n => n_reset,
> clk_n => cpuClock,
> wait_n => '1',
> int_n => '1',
> nmi_n => '1',
> busrq_n => '1',
> mreq_n => n_MREQ,
> iorq_n => n_IORQ,
> rd_n => n_RD,
> wr_n => n_WR,
> a => cpuAddress,
> di => cpuDataIn,
> do => cpuDataOut);
>
> --
> ____________________________________________________________________________________
> -- ROM GOES HERE
>
> rom1 : entity work.Z80_BASIC_ROM -- 8KB BASIC
> port map(
> address => cpuAddress(12 downto 0),
> clock => clk,
> q => basRomData
> );
>
> --
> ____________________________________________________________________________________
> -- RAM GOES HERE
>
> sramAddress(15 downto 0) <= cpuAddress(15 downto 0);
> sramData <= cpuDataOut when n_memWR='0' else (others => 'Z');
> n_sRamWE <= n_memWR or n_externalRamCS;
> n_sRamOE <= n_memRD or n_externalRamCS;
> n_sRamCS <= n_externalRamCS;
>
> --
> ____________________________________________________________________________________
> -- INPUT/OUTPUT DEVICES GO HERE
> io1 : entity work.SBCTextDisplayRGB
> port map (
> n_reset => n_reset,
> clk => clk,
>
> -- RGB video signals
> hSync => hSync,
> vSync => vSync,
> videoR0 => videoR0,
> videoR1 => videoR1,
> videoG0 => videoG0,
> videoG1 => videoG1,
> videoB0 => videoB0,
> videoB1 => videoB1,
>
> -- Monochrome video signals (when using TV timings only)
> sync => videoSync,
> video => video,
>
> n_wr => n_interface1CS or n_ioWR,
> n_rd => n_interface1CS or n_ioRD,
> n_int => n_int1,
> regSel => cpuAddress(0),
> dataIn => cpuDataOut,
> dataOut => interface1DataOut,
> ps2Clk => ps2Clk,
> ps2Data => ps2Data
> );
>
> --
> ____________________________________________________________________________________
> -- MEMORY READ/WRITE LOGIC GOES HERE
> n_ioWR <= n_WR or n_IORQ;
> n_memWR <= n_WR or n_MREQ;
> n_ioRD <= n_RD or n_IORQ;
> n_memRD <= n_RD or n_MREQ;
> --
> ____________________________________________________________________________________
> -- CHIP SELECTS GO HERE
> n_basRomCS <= '0' when cpuAddress(15 downto 13) = "000" else '1'; --8K at
> bottom of memory
> n_interface1CS <= '0' when cpuAddress(7 downto 1) = "1000000" and
> (n_ioWR='0' or n_ioRD = '0') else '1'; -- 2 Bytes $80-$81
> n_externalRamCS<= not n_basRomCS;
> --
> ____________________________________________________________________________________
> -- BUS ISOLATION GOES HERE
>
> cpuDataIn <=
> interface1DataOut when n_interface1CS = '0' else
> basRomData when n_basRomCS = '0' else
> sramData when n_externalRamCS= '0' else
> x"FF";
>
> --
> ____________________________________________________________________________________
> -- SYSTEM CLOCKS GO HERE
>
> -- SUB-CIRCUIT CLOCK SIGNALS
> serialClock <= serialClkCount(15);
> process (clk)
> begin
> if rising_edge(clk) then
>
> if cpuClkCount < 4 then -- 4 = 10MHz, 3 = 12.5MHz, 2=16.6MHz, 1=25MHz
> cpuClkCount <= cpuClkCount + 1;
> else
> cpuClkCount <= (others=>'0');
> end if;
> if cpuClkCount < 2 then -- 2 when 10MHz, 2 when 12.5MHz, 2 when 16.6MHz, 1
> when 25MHz
> cpuClock <= '0';
> else
> cpuClock <= '1';
> end if;
>
> if sdClkCount < 49 then -- 1MHz
> sdClkCount <= sdClkCount + 1;
> else
> sdClkCount <= (others=>'0');
> end if;
> if sdClkCount < 25 then
> sdClock <= '0';
> else
> sdClock <= '1';
> end if;
>
> -- Serial clock DDS
> -- 50MHz master input clock:
> -- Baud Increment
> -- 115200 2416
> -- 38400 805
> -- 19200 403
> -- 9600 201
> -- 4800 101
> -- 2400 50
> serialClkCount <= serialClkCount + 2416;
> end if;
> end process;
>
>
> end;
>
>
>
> On Thu, 27 Mar 2014 09:10:07 +1030, Grant Searle <home.m...-***@public.gmane.org<javascript:>>
> wrote:
>
> Hi.
>
> The web hoster has temporarily blocked my site due to high CPU usage (can
> I blame you guys ;) )
>
> Anyway, I keep a full mirror of my site up to date here...
> http://zx80.netai.net/grant/
>
> And, in particular, the Multicomp page here:
> http://zx80.netai.net/grant/Multicomp/index.html
>
> Please use the main server whenever possible, but go to the above if the
> main site is down (again...)
>
> Glad to see my pages are of interest to you. I'm currently soldering up
> one of James's boards so hope to get it running on there in a couple of
> days (bit busy at the moment so not much spare time).
>
> Any probs, please feel free to contact me.
>
> Have fun.
>
> Grant
> Main:
> http://searle.hostei.com/grant/
>
> Mirror:
> http://zx80.netai.net/grant/
>
> --
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>
>
>
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