[N8VEM: 17998] First socz80 release

[William R Sowerbutts]

Hi everyone

Thanks for your feedback on my Z80 FPGA computer project. Your kind words and
enthusiasm have rekindled my interest in the project.

I've put up a web page (largely based on my email to the list), and I've put
together a release which includes;

- FPGA bitstream for Papilio Pro
- Full VHDL source code
- Source code to the ROM monitor
- CP/M 2.2 BIOS (including source code)
- MP/M-II XIOS (including source code)
- RAM disk images to run CP/M 2.2, MP/M-II and UZI

My source code included in this release is licensed under the GNU GPL 3.

You can download it now at http://sowerbutts.com/socz80/

The UZI port is included and runs well. I've not included the source code in
this release although I plan to in a future release -- I'm going to separate
out the platform-dependent code and get it booting on the Mark IV SBC and
then release one distribution for both platforms. In the interim please
contact me off-list if you'd like the source.

Any feedback would be warmly received, and I would really love to hear from
you if you get socz80 working on your FPGA.

Thanks, and happy hacking!

Will

_________________________________________________________________________
William R Sowerbutts will-***@public.gmane.org
"Carpe post meridiem" http://sowerbutts.com
main(){char*s=">#=0> ^#X@#@^7=",c=0,m;for(;c<15;c++)for
(m=-1;m<7;putchar(m++/6&c%3/2?10:s[c]-31&1<<m?42:32));}

[Ted Agar]

Will,

I had a Papillio Pro on hand that I had purchased for another project (PDP8
from Opencores) so I gave your Z80 system a go. WOW! This is a very nice
piece of work, and FAST! I'm one of the greybeards who experienced CP/M
when it was new (I still have an IMSAI 8080 in my collection). I can
appreciate all of your hard work in getting this thing to fly. I wrote a
CP/M BIOS in 8080 assembler myself once (a LONG time ago) so I can
especially appreciate your efforts in that area. Your Z80 code looks fine
to me by the way, and you did a great job in masking the relatively slow
speed of the DRAM with the cache. It screams!

I brought your system up using a Windows 7 machine and the only problem
that I encountered involved Python. I seemed to have to use the 2.7 rather
than the 3.4 release, and it took me a while to realize that I was having
difficulty in trying to share the serial port between Putty (for the
console) and your script which transfers stuff to the FPGA machine. I just
stopped Putty for the transfer and restarted it when the transfer was done,
it worked a charm. No big deal and the issue was probably due to my total
unfamiliarity with Python (Or maybe I should have known that Windows wasn't
going to allow sharing of the serial port).

I noticed on another post that you have completed one of John's Mark IV
boards. Another fine piece of work - thank you John! I managed to get mine
functioning a couple of days ago, I love the thing! I find that I have to
inspect my builds with a USB microscope these days because it's too easy to
create a subtle short. When I first powered the Mark IV board up it not
only didn't work but the RTC chip was getting uncomfortably warm. I found
that short pretty quickly but I'm going to have to stop bending leads to
keep the parts in place while I turn the board over for soldering...

I've been wanting to get working with FPGAs for some time now. This and
also Grant Searle's nice project have helped to jumpstart me. I'll learn a
lot from both of you guys... thanks so much for sharing! FPGAs are a real
treat for me - in the early '70s I built a cpu of my own design using
second generation logic circuits interconnected via wirewrap. It's so much
easier to just describe what you want in a high-level language and let
modern technology do the grunt work for you.

ted agar

Post by William R Sowerbutts
Hi everyone
Thanks for your feedback on my Z80 FPGA computer project. Your kind words and
enthusiasm have rekindled my interest in the project.
I've put up a web page (largely based on my email to the list), and I've put
together a release which includes;
- FPGA bitstream for Papilio Pro
- Full VHDL source code
- Source code to the ROM monitor
- CP/M 2.2 BIOS (including source code)
- MP/M-II XIOS (including source code)
- RAM disk images to run CP/M 2.2, MP/M-II and UZI
My source code included in this release is licensed under the GNU GPL 3.
You can download it now at http://sowerbutts.com/socz80/
The UZI port is included and runs well. I've not included the source code in
this release although I plan to in a future release -- I'm going to separate
out the platform-dependent code and get it booting on the Mark IV SBC and
then release one distribution for both platforms. In the interim please
contact me off-list if you'd like the source.
Any feedback would be warmly received, and I would really love to hear from
you if you get socz80 working on your FPGA.
Thanks, and happy hacking!
Will
_________________________________________________________________________
"Carpe post meridiem" http://sowerbutts.com
(m=-1;m<7;putchar(m++/6&c%3/2?10:s[c]-31&1<<m?42:32));}