Discussion:
[N8VEM: 17018] Z80 Coprocessor
James Moxham (Dr_Acula)
2014-01-05 11:24:24 UTC
Permalink
I've been working on a touchscreen board, and while I have a board that
works with the propeller chip

I've got an idea that it can also be done with a Z80 chip.

The touchscreens are getting less - under $10 now with free shipping
http://www.ebay.com.au/itm/2-4-Inch-TFT-LCD-Module-Display-240-x-320-Screen-Touch-Panel-PCB-adapter-NEW-/301036501983?pt=AU_B_I_Electrical_Test_Equipment&hash=item46172c7bdf

Getting that pacman program working took a lot of coding, and while it is
very simple to put a picture on the screen, it is more complicated to move
sprites around. Data needs to be dumped out of two ram chips at 5-10Mhz and
in a 16 bit wide bus. Also the touchscreen needs to be polled regularly for
the finger position. The propeller is a good chip for this as it can do
several things at once, but I'd like to see it done with a Z80.

So - why not have several Z80 co-processor chips on a separate ECB board?

We can have one devoted to polling the touchscreen finger position, and
another dumping out sprites as fast as possible, so this frees up the main
Z80 for higher level tasks like the game logic. I have designed a generic
minimal Z80 co-processor circuit - see attached.

Lots of things are already on the ECB bus and the motherboard, eg power
supply, clock signal, and all the smart code to boot up a Z80, so no eprom
is needed. Only 5 chips. It seems a bit bad to only use 64k of a ram chip
with 512k but these chips are cheap, and that saves on decode logic. An
8255 handles the interface to the ECB bus and a bootstrap program can be
placed in the first 1024k of ram. There is another 8255 for general I/O. A
74688 decodes the port address and this uses 4 ports per Z80. Data transfer
is via a pseudo DMA via the lower 1024k of ram and via the 8255 chip.

I'm not sure where this will end up, but it might be possible to squeeze up
to 3 of these coprocessor circuits on a single ECB board.

Thoughts would be most appreciated.

Cheers, James Moxham
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Wolfgang Kabatzke
2014-01-05 15:03:03 UTC
Permalink
Post by James Moxham (Dr_Acula)
I've been working on a touchscreen board, and while I have a board
that works with the propeller chip
http://youtu.be/ZUDNXO4TZ6Y I've got an idea that it
can also be done with a Z80 chip.
The touchscreens are getting less - under $10 now with free shipping
http://www.ebay.com.au/itm/2-4-Inch-TFT-LCD-Module-Display-240-x-320-Screen-Touch-Panel-PCB-adapter-NEW-/301036501983?pt=AU_B_I_Electrical_Test_Equipment&hash=item46172c7bdf
Getting that pacman program working took a lot of coding, and while it
is very simple to put a picture on the screen, it is more complicated
to move sprites around. Data needs to be dumped out of two ram chips
at 5-10Mhz and in a 16 bit wide bus. Also the touchscreen needs to be
polled regularly for the finger position. The propeller is a good chip
for this as it can do several things at once, but I'd like to see it
done with a Z80.
So - why not have several Z80 co-processor chips on a separate ECB board?
We can have one devoted to polling the touchscreen finger position,
and another dumping out sprites as fast as possible, so this frees up
the main Z80 for higher level tasks like the game logic. I have
designed a generic minimal Z80 co-processor circuit - see attached.
Lots of things are already on the ECB bus and the motherboard, eg
power supply, clock signal, and all the smart code to boot up a Z80,
so no eprom is needed. Only 5 chips. It seems a bit bad to only use
64k of a ram chip with 512k but these chips are cheap, and that saves
on decode logic. An 8255 handles the interface to the ECB bus and a
bootstrap program can be placed in the first 1024k of ram. There is
another 8255 for general I/O. A 74688 decodes the port address and
this uses 4 ports per Z80. Data transfer is via a pseudo DMA via the
lower 1024k of ram and via the 8255 chip.
I'm not sure where this will end up, but it might be possible to
squeeze up to 3 of these coprocessor circuits on a single ECB board.
Thoughts would be most appreciated.
Cheers, James Moxham
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Hi James,

the idea is an "old" idea. I worked with such systems more then 20 years
ago. The real job is to combine all CPU愀 (Z80) with the Master-CPU. I
saw that You connect an 8255 as bridge from ECB to Z80. Ok. One signal,
which the 8255 generates, is /BUSREQ. Ok, You will work with DMA (or
pseudo DMA). But, DMA is not so easy because You forgot to observe the
/BUSAK-Signal from the CoPro-Z80. This signal tells You that the bus is
free. Please trust me that DMA is not so easy to handle....

My idea is that You combine all CPU to the Master-CPU with an
Dual-Port-Memory. You need on Your Master-System only one memory-window
(1kB .... 8kB) and a select-logic which "transforms" the window-area of
Your Master-CPU to each Slave-CPU. Each Slave - CPU has his own memory
(RAM and EPROM) and IO... You may shift data into the RAM and the
special firmware in the EPROM can start software in the RAM... OK, You
need for this an special data structure...

If thsi works with an 8255 I don愒 know. From my point of view I take
for all Z80-designs the "Z80-family-IC" like PIO, SIO, UART, CTC, DMA
etc. This makes the interfacing and timing easier. But this is my point
of view and my personal experience.... In the past I扉e had many
problems with too slow 8255. Ok, the Z80-PIO has only 16Bit I/O, but the
frequency of CLK confirms to the CLK of the CPU (You must use the right
IC with the right prefixes -> Z80B-CPU needs Z80B-PIO, CTC ...

Thes are my ideas when I read You Mail.


Best regards


Wolfgang
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Dr.-Ing. Wolfgang Kabatzke
Hansastrasse 9

DE - 21 502 Geesthacht
Deutschland / Germany

Phone: +49 4152 93 18 130 NEW!!!
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